| 研究生: |
謝宗廷 Hsieh, Tsung-Ting |
|---|---|
| 論文名稱: |
數位多相式降壓型電源轉換器之研究與設計 Study and Design of Digital Multiphase Buck Converter |
| 指導教授: |
蔡建泓
Tsai, Chien-Hung |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2017 |
| 畢業學年度: | 105 |
| 語文別: | 中文 |
| 論文頁數: | 98 |
| 中文關鍵詞: | 多相式降壓型穩壓器 、電流平衡 、數位脈波寬度調變器 |
| 外文關鍵詞: | Multiphase Buck Converter, Current Balancing, Digital Pulse Width Modulator |
| 相關次數: | 點閱:107 下載:5 |
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本論文實現一具主動式電流平衡之數位四相式降壓型電源轉換器。首先介紹多相式電源轉換器與單相式電源轉換器的工作原理。分別對類比控制和數位控制的多相式降壓型電源轉換器進行介紹。整理有關多相式降壓型電源轉換器的近期文獻及產品,針對系統架構進行分類並且比較各種架構的優缺點,最後選出本論文預計使用的系統架構。另外,電流平衡機制為多相式電源轉換器的重要議題,因為要發揮多相式電源轉換器的優點就必須使每相電感電流平衡。電流平衡方法可以分為被動式和主動式,兩者的區別在於需不需要得知每相電感電流資訊。在整理及比較相關文獻後,本論文採用主動式的電流平衡方法。在數位控制多相式電源轉換器中,數位脈波寬度調變器為影響電流平衡精確度的重要電路。因此本論文針對數位脈波寬度調變器的架構進行探討,並實現一個具校準機制的數位脈波寬度調變器。最後以FPGA平台實現本論文的系統,並搭配自行設計之四相式降壓型功率級電路板驗證本論文的系統。
A digital four phase buck converter with active current balancing mechanism has been implemented in this thesis. First, the operating principle of the multiphase and single phase are introduced. Then introducing the analog control and digital control of the multiphase buck converter. The recent literature and products of the multiphase buck power converter are classified according to the system architecture. The advantages and disadvantages of the various architectures are compared. Finally, the system architecture expected to be used in this paper is selected. Otherwise, the current balancing mechanism is an important issue for multiphase power converters. If each phase of the inductor current is not balanced with other phases, the whole system will have some problem. Current balance method can be divided into passive and active way. The difference between the two is that need not know each phase inductor current information. After comparing the relevant literature, this paper adopts the active current balance method. In digitally controlled multiphase power converters, digital pulse width modulators are important circuits that affect current balance accuracy. Therefore, this paper discusses the architecture of digital pulse width modulator and realizes a digital pulse width modulator with calibration mechanism. Finally, the FPGA platform is used to realize the system of this thesis, and the system of the thesis is verified by the four phase buck circuit board.
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校內:2022-08-31公開