在本論文中，藉由依元件結構直接求解二維帕桑方程式，分別針對δ式摻雜高電子移動率電晶體與摻雜通道式場效電晶體，推導與建立電晶體元件分析模型。作為異質接面場效電晶體通道之高速化合物，因具有低有效電子質量與高Γ-L分隔特性，而衍生之電子速度突起現象，亦已納入在本元件模型中考慮。論文中並以此元件分析模型，對摻雜通道式場效電晶體結構參數探討最佳化設計，與推導其「汲極引起之能障降低現象」(DIBL)的短通道效應，作深入之探討。另對於δ式摻雜高電子移動率電晶體元件分析模型之推導，首先採用自我一致性計算，描述異質接面中二維電子雲密度與閘極偏壓之間的電量控制關係，再藉助於Giblin-Scherer-Wierich (GSW) 電子速度-電場特性式，成功地描述其元件之工作特性。此改良模型進一步直接求解二維帕桑方程式，考量其他模型忽略之閘-汲極分隔區之電流貢獻成份。尤其，此元件分析模型首次成功地以量化表示式描述δ式摻雜高電子移動率電晶體在截止狀態下，其兩端閘-汲極之崩潰特性係起因於閘極-肖特基層間之熱電場激發效應，與閘-汲極通道層中之碰撞累增放大之綜合性影響所造成之物理現象。
　　本論文成功地建立δ式摻雜高電子移動率電晶體與摻雜通道式場效電晶體之元件分析模型，並推導出蘊含物理意義之表示式，針對元件特性提供深入、明確之探討。在論文中，藉由此元件分析模型而衍生之模擬數值與實驗結果均能獲得一致性之特性預期。有別於耗費計算成本、且未具物理涵義之數值分析方法，此元件分析模型能提供高效率設計、便利之工作平台。最後，此分析模型之延伸應用：可進而推導、萃取異質接面場效電晶體之高頻元件參數、探討具有漸變式通道或多層步級變化式通道結構之異質接面場效電晶體元件模型、以及研討互補式異質接面場效電晶體之次臨界電流導通等現象。

　　In this dissertation, we have proposed analytic theories for the δ-HEMT and PDCFET by solving the two-dimensional Poison equation in a straightforward manner. The velocity overshoot phenomenon associated within the low effective mass and large Γ-L separation in the channel compounds has also been included in deriving the device model. Device optimization from the analytic modeling the PDCFET has been studied. In addition, one of the significant short-channel effects, the drain-induced barrier-lowering (DIBL) phenomenon, has also been investigated explicitly based on the proposed model. For characterizing the δ-HEMT device performance, the self-consistent method was employed to develop the two-dimensional electron gas (2DEG) on the gate voltage according to the charge control law. With the aids of the Giblin-Scherer-Wierich (GSW) velocity-field relation, the current-voltage characteristics have been calculated and discussed. The current contribution from the gate-drain spacing has been included to improve the device model by solving the 2D Poisson equation.

　　Moreover, the analytic model has been presented for the first time to characterize the off-state two-terminal gate-drain breakdown phenomenon of the δ-HEMT devices. The combined effects of the thermionic-field emission induced tunneling gate current and the impact-ionized Auger multiplication along the gate-drain transverse electric field have resulted in the off-state breakdown criteria. Comparable expectations from the proposed analytic models have been achieved with respect to the experimental results. Since the potential profile of the gate-drain regime can be well described by directly solving the 2D Poisson equation, this model can be extended for various HFET structures.

　　In summary, the presented analytic models can provide in-depth understanding of the device physics in explicit mathematical expressions. The calculated results demonstrate in excellent agreement with the empirical work. By means of the analytic device model, convenient design platform can be realized to optimize the device performance. The promising extensions of this work have also been concluded for future research including the direct application for extracting the microwave device parameters, for characterizing the graded-composition channel or step-graded multi-channels HFET’s, and for investigating the subthreshold current for complementary HFET’s.

[1] W. Schockley, U. S. Patent 2,569,347, 1951.

[2] H. Kroemer. Proc. IRE, vol. 45, p. 1535, 1957.

[3] L. Esaki and R. Tsu, Internal Report RC 2418, IBM Research, March 26, 1969.

[4] R. Dingle, H. L. Stromer, A. C. Gossard and W. Wiegmann, Appl. Phys. Lett., vol. 37, p. 805, 1978.

[5] T. Mirura, S. Hyamizu, T. Fuji and K. Nanbu “A New Field-Effect Transistor with Selective Doped GaAs/n-AlGaAs Heterojunctions”, Jap. J. Appl. Phys., vol.19, No. 5, L225, 1980.

[6] H. Hida, A. Okamoto, H. Toyoshima and K. Ohata, IEEE Electron Device Lett, vol. 7, p. 625, 1986.

[7] W. C. Hsu, H. M. Shieh, M. J. Kao, R. T. Hsu and Y. H. Wu, “High Performance δ-Doped GaAs/InxGa1-xAs Pseudomorphic High Electron Mobility Transistor Utilizing a Graded InxGa1-xAs Channel”, IEEE Trans. Electron Devices, vol. 40, p. 456, 1994.

[8] C. L. Wu and W. C. Hsu, “Enhanced Resonant Tunneling Real-Space in δ-Doped GaAs/InGaAs Gated Dual Channel Transistors Grown by MOCVD”, IEEE Trans. Electron Devices, vol. 43, p. 207, 1996.

[9] W. C. Hsu, C. S. Lee and Y. S. Lin, “Characterizations of the δ-doped InP Heterostructures Using In0.34Al0.66As0.85Sb0.15 Schottky Layer”, J. Appl. Phys., vol. 91, p. 1385, 2002.

[10] Y. S. Lin, W. C. Hsu, C. Y. Yeh and H. M. Shieh, “In0.34Al0.66As0.85Sb0.15 /δ-InP heterostructure field-effect transistors”, Appl. Phys. Lett., vol. 76, p. 3124, 2000.

[11] W. C. Liu, K. H. Yu, R. C. Liu, K. W. Lin, K. P. Lin, C. H. Yen, C. C. Cheng and K. B. Thei, “Investigation of Temperature-Dependent Characteristics of an n+-InGaAs/n-GaAs Composite Doped Channel HFET”, IEEE Trans. Electron Devices, vol. 48, p. 2677, 2001

[12] D. Delagebeaudeuf and N.T. Linh, “Metal-(n)AlGaAs-GaAs Two Dimensional Gas FET”, IEEE Trans. Electron Devices, vol. 29, p. 995, 1982.

[13] K. Lee, M. S. Shur, T. J. Drummond and H. Morkoc, “Current-Voltage Characteristics of Modulation-Doped Field-Effect Transistor”, IEEE Trans. Electron Devices, vol. 30, p. 207,1983.

[14] T. J. Drummond, H. Morkoc, K. Lee and M. S. Shur, “Model for Modulation-Doped Field-Effect Transistor”, IEEE Electron Device Lett., vol. 3, p. 338, 1982.

[15] K. Lee, M. S. Shur, T. J. Drummond and H. Morkoc, “Electron Density of the Two-Dimensional Electron Gas in Modulation-Doped Layers”, J. Appl. Phys., vol. 54, p. 2093,1983.

[16] F. N. Trofimenkoff, Proc. IEEE, vol. 53, p. 1765, 1965.

[17] G. W. Wang and W. H. Ku, “An Analytic Computer-Aided Model of the AlGaAs/GaAs High Electron Mobility Transistor”, IEEE Trans. Electron Devices, vol. 33, p. 657, 1986.

[18] H. Happy, S. Bollaert, H. Foure and A. Cappy, “Numerical Analysis of Device Performance of Metamorphic InAlAs/InGaAs HEMT’s on GaAs Substrate”, IEEE Trans. Electron Devices, vol. 45, p.2089, 1998.

[19] S. Babiker, N. Cameron, A. Asenov and S.P. Beaumont, “New Evidence for Velocity Overshoot in a 200nm Pseudomorphic HEMT”, Microelectronics Journal, vol. 27, p.785, 1996.

[20] Y. S. Lin, W. C. Hsu and C. Y. Chang, “Low-Leakage-Current and High-Breakdown-Voltage GaAs-Based Heterostructure Field-Effect Transistor with InAlGaP Schottky Layer”, Appl. Phys. Lett., vol. 75, p. 3551, 1999.

[21] S. R. Bahl, J. A. del Alamo, J. Dickman and S. Schildberg, “Off-State Breakdown in InAlAs/InGaAs MODFET’s” IEEE Trans. Electron Devices, vol. 42, p. 15, 1995.

[22] S. M. Sze, Physics of Semiconductor Devices, 2nd edition, Wiley Inter. Science, 1981.

[23] A. B. Grebene and S. K. Ghandhi, “General Theory for Pinched Operation of the Junction-Gate FET”, Solid-State Electron., vol. 12, p. 573, 1969.

[24] K. K. Thornber, “Relation of Drift Velocity to Low-Field Mobility and High-Field Saturation Velocity”, J. Appl. Phys., vol. 51, p. 2127, 1980.

[25] B. Hoefflinger, “Output Characteristics of Short-Channel Field-Effect Transistors”, IEEE Trans. Electron Devices, vol. 28, p. 971, 1981.

[26] R. A. Giblin, E. F. Scherer and R. L. Wierich, “Computer Simulation of Instability and Noise in High-Power Avalanche Devices”, IEEE Trans. Electron Devices, vol. 20, p. 404, 1973.

[27] J. G. Riuchand G.S. Kino, “Measurement of the Velocity-Field Characteristics of GaAs”, Appl. Phys. Lett., vol. 10, p. 40, 1967.

[28] R. A. Houston and A. G. R. Evans, “Electron Drift Velocity in n-GaAs at High Electric Fields”, Solid-State Electron., vol. 20, p. 197, 1977.

[29] B. Kramer and A. Mircea, “Determination of Saturated Electron Velocity in GaAs”, Appl. Phys. Lett., vol. 26, p. 623, 1975.

[30] C. S. Chang and H. R. Fetterman, “Electron Drift Velocity versus Electric Field in GaAs”, Solid-State Electron., vol. 29, p. 1295, 1986.

[31] E. F. Schubert, A. Fischer and K. Ploog, “The δ-Doped Field-Effect Transistor (δFET)”, IEEE Electron Device Lett., vol. 33, p. 625, 1986.

[32] R. Dingle, Semiconductors and Semimetals Vol. 24, “Applications of Multiquantum Wells, Selectively Doping, and Superlattices”, chapter 3, 1987.

[33] E. M. Conwell and V. F. Weisskopf, “Ionized Impurity Scattering in Semiconductors”, Phys. Rev., vol. 77, p. 388, 1950.

[34] H. Hida, A. Okamoto, H. Toyoshima and K. Ohata, IEEE Electron Device Lett., vol. 7, p. 625, 1986.

[35] H. Hida, A. Okamoto, H. Toyoshima and K. Ohata, IEEE Trans. Electron Devices, vol. 34, p. 1448, 1987.

[36] J. Baek, M. S. Shur, R. R. Daniels, D. K. Arch, J. K. Abrokwah and O. N. Tufte, IEEE Trans. Electron Devices, vol. 34, p.1650, 1987.

[37] S. Fujita and T. Mizutani, IEEE Trans. Electron Devices, vol. 34, p. 1889, 1987.

[38] Y. J. Chan and M. T. Yang, “Al0.3Ga0.7As/InxGa1-xAs (0<x<0.25) Doped-Channel Field-Effect Transistors (DCFET’s)”, IEEE Trans. Electron Devices, vol. 42, p. 1745, 1995.

[39] Y. S. Lin, T. P. Sun and S. S. Lu, ”Ga0.51In0.49As/In0.15Ga0.85As/GaAs Pseudomorphic Doped-Channel FET with High-Current Density and High-Breakdown Voltage”, IEEE Electron Device Lett., vol.18, p. 150, 1997.

[40] J. R. Lothian, J. M. Kou, S. J. Pearton and F. Ren, Proc. Mater. Res. Soc. Symp., vol. 240, p. 307, 1998.

[41] H. Willemsen and D. Nicholson, IEEE GaAs IC Symp. Tech. Dig., p. 10, 1996.

[42] L. W. Laih, W. S. Lour, J. H. Tsai, W. C. Liu, C. Z. Wu, K. B. Thei and R. C. Liu, Solid-State Electron., vol. 39, p. 15, 1996.

[43] C. S. Lee and W. C. Hsu, “Analytic Modeling for Current-Voltage Characteristics of InGaP/InGaAs/GaAs Pseudomorphic Doped-Channel Field-Effect Transistors (PDCFET’s)”, Superlattices and Microstructures, vol. 30, p. 145, 2001.

[44] J. P. Ao, Q. M. Zeng, Y. L. Zhao, X. J. Li, W. J. Liu, S. Y. Liu and C. G. Liang, “InP-Based Enhancement-Mode Pseudomorphic HEMT with Strained In0.45Al0.55As Barrier and In0.75Ga0.25As Channel Layers”, IEEE Trans. Electron Devices, vol. 21, p. 200, 2000.

[45] H. Fukui, Solid-State Electron., vol. 22, p. 507, 1979.

[46] C. Z. Wu, L. W. Laih and W. C. Liu, Solid-State Electron., vol. 39, p. 791, 1996.

[47] P. Pouvil, J. Gautier and D. Pasquet, IEEE Trans. Electron Devices, vol. 35, p. 1215, 1988.

[48] K. H. Yu, K. W. Lin, C. C. Cheng, K. P. Lin, C. H. Yen, C. Z. Wu and W. C. Liu, “InGaP/GaAs Camel-Like Field-Effect Transistor for High-Breakdown and High-Temperature Applications”, Electron. Lett., vol. 36, p. 1886, 2000.

[49] F. T. Chien, S. C. Chiol, and Y. J. Chan, “Improved Voltage Gain of Transimpedance Amplifier by AlGaAs/InGaAs Doped-Channel FET’s”, IEEE Electron Device Lett., vol.21, p. 60, 2000.

[50] D. C. Dumka, G. Gueva, I. Adesida, H. Hier and O. A. Aina, “Doped Multi-channel AlAs0.56Sb0.44/In0.53Ga0.47As Field Effect Transistors”, Electron. Lett., vol. 35, p.1673, 1999.

[51] S. S. Lu, Y. W. Hsu, C. C. Meng and L. P. Chen, “Single-Voltage-Supply of Ga0.51In0.49As/In0.15Ga0.85As Insulated-Gate FET for Power Application”, IEEE Electron Device Lett., vol. 20, p. 21, 1999.

[52] T. Tsuchiya, Y. Sato and M. Tomizawa, “Three Mechanisms Determining Short-Channel Effects in Fully-Depleted SOI MOSFET’s”, IEEE Trans. Electron Devices, vol. 45, p. 1116, 1998.

[53] J. Y. Tsai, J. Sun, K. F. Yee and C. M. Osburn, “DIBL Considerations of Extended Drain Structure for 0.1 μm MOSFET’s”, IEEE Electron Device Lett., vol. 17, p. 331, 1996.

[54] C. S. Lee, W. C. Hsu and C. L. Wu, “Analytic Modeling for Drain-Induced Barrier Lowering (DIBL) Phenomenon of the InGaP/InGaAs/GaAs Pseudomorphic Doped-Channel Field-Effect Transistor”, submitted to Jpn. J. Appl. Phys..

[55] W. R. Frensley, IEEE Trans. Electron Devices, vol. 28, p. 962, 1981.

[56] C. F. Gerald and P. O. Wheatley, Applied Numerical Analysis, Addison Wesley, 5th ed., Chap. 2, p. 164, 1994.

[57] B. Brandstatter,C. Magele and W. Ring, “A Full Step Newton Method for the Solution of a Nonlinear Magnetostatic Optimization Problem”, IEEE Trans. Magn., vol. 37, p. 3212, 2001.

[58] L. T. Hung and W. S. Lour, “Characteristics of Doping- and Composition-Graded Doped Channel HFET’s with AlGaAs Gate Insulator”, Solid-State Electron., vol. 42, p. 363, 1998.

[59] L. W. Laih, S. Y. Cheng, W. C. Wang, P. H. Lin, J. Y. Chen, W. C. Liu and W. Lin, “High-Performance InGaP/InGaAs/GaAs Step-Compositioned Doped-Channel Field-Effect Transistor (SCDCFET)”, Electron. Lett., vol. 33, p. 98, 1997.

[60] Y. J. Jeon, Y. H. Jeong, B. Kim, Y. G. Kim, W. P. Hong and M. S. Lee, “DC and RF Performance of LP-MOCVD Grown Al0.25Ga0.75As/InxGa1-x/As (x=0.15-0.28) P-HEMT's with Si-Delta Doped GaAs Layer”, IEEE Electron Device Lett., vol. 16, p. 563, 1995.

[61] D. H. Jeong, K. S. Jang, J. S. Lee, Y. H. Jeong and B. Kim, ” DC and AC Characteristics of Al0.25Ga0.75As/GaAs Quantum-Well Delta-Doped Channel FET Grown by LP-MOCVD”, IEEE Electron Device Lett., vol. 13, p. 270, 1992.

[62] L. Shen, S. Heikman, B. Moran, R. Coffie, N. Q. Zhang, D. Buttari, I. P. Smorchkova, S. Keller, S. P. DenBaars, U. K. Mishra, “AlGaN/AlN/GaN High-Power Microwave HEMT”, IEEE Electron Device Lett., vol. 22, p. 457, 2001.

[63] C. S. Lee, W. C. Hsu, Y. W. Chen, Y. C. Chen and H. M. Shieh, “High-Temperature Breakdown Characteristics of d-doped In0.49Ga0.51P/GaAs/In0.25Ga0.75As/AlGaAs High Electron Mobility Transistor”, Jpn. J. Appl. Phys. Lett., vol. 39, p. 1029, 2000.

[64] Y. S. Lin, W. C. Hsu, C. H. Wu, W. Lin and R. T. Hsu, “High Breakdown voltage Symmetric Double δ-doped In0.49Ga0.51P/In0.25Ga0.75As/GaAs High Electron Mobility Transistor”, Appl. Phys. Lett., vol. 75, p. 1616, 1999.

[65] K. B. Cough, C. Caneau, W. P. Hong and J. I. Song, “Al0.25In0.75P/Al0.48In0.52As/ Ga0.35In0.65As Graded Pseudomorphic HEMT’s with High Channel-Breakdown Voltage”, IEEE Electron Device Lett., vol. 15, p. 33, 1994.

[66] C. S. Lee, W. C. Hsu, H. M. Shieh, J. S. Su, “A Novel Dual-Mode InAlAsSb/InGaAs/InP Inverted δ-Doped Heterostructure Field-Effect Transistor”, Solid-State Electron., vol. 44, p. 1635, 2000.

[67] W. P. Hong, R. Baht, J. R. Hayes, C. Nguyen, M. Koza and G. K. Chang, ”High-Breakdown High-Gain InAlAs/GaInAs HFET’s”, IEEE Electron Device Lett., vol. 12, p. 559, 1991.

[68] C. L. Lin, P. Chu, A. L. Kellner and H. H. Wieder, “Composition Dependence of Au/InxAl1-xAs Schottky Barrier Heights”, Appl. Phys. Lett., vol. 49, p. 1593, 1986.

[69] T. Ando and S. Mori, “Effective-Mass Theory of the Semiconductor Heterojunctions and Superlattices”, Surface Science, vol. 113, p. 124, 1982.

[70] M. J. Moloney, F. Ponse and H. Morkoc, “Gate Capacitance-Voltage Characteristics of MODFET’s: Its Effect on Transconductance”, IEEE Trans. Electron Devices, vol. 9, p.1675, 1985.

[71] Y. Ando and T. Itoh, “Analysis of Charge Control in Pseudomorphic Two-Dimensional Electron Gas Field-Effect Transistor”, IEEE Trans. Electron Devices, vol. 35, p.2295, 1988.

[72] J. E. Manzoli, M. A. Romero and O. Hipolito, “On the Capacitance-Volatge Modeling of Strained Quantum-Well MODFET’s”, IEEE Trans. Electron Devices, vol. 34, p.2314, 1998.

[73] S. Babiker, A. Asenov, S. Roy and S. P. Beaumont, “Strained Engineered pHEMT on Virtual Substrates: A Monte Carlo Simulation Study”, Solid-State Electron., vol. 43, p. 1281, 1999.

[74] R. Drury and C. M. Snowden, “A Quasi-Two-Dimensional HEMT Model for Microwave CAD Applications”, IEEE Trans. Electron Devices, vol. 42, p.1026, 1995.

[75] S. R. Bahl and J. A. del Alamo, “Physics of Breakdown in InAlAs/n+-InGaAs Heterostructure Field-Effect Transistors”, Proc. 5th Int. Conf. InP and Related Materials, Paris, France, p. 243, 1993.

[76] S. R. Bahl and J. A. del Alamo, “Breakdown Voltage Enhancement from Channel Quantization in InAlAs/n+-InGaAs HFET’s”, IEEE Electron Device Lett., vol. 13, p. 123, 1992.

[77] H. Morkoc, H. Unlu and G. Ji, Principles and Technology of MODFET’s, Johnson Wiley & Sons, 1991, p. 150.

[78] K. K. Ng, Complete Guide to Semiconductor Devices, McGraw-Hill Inc., 1995, p. 115.

[79] M. Shur, Physics of Semiconductor Devices, Prentice Hall, 1990, p. 185.

[80] F. Stern and S. D. Sarma, “Electron Energy Levels in GaAs/GaxAl1-xAs Heterojunctions”, Phys. Rev. B., vol. 30, p. 840, 1984.

[81] T. Ando, “Self-Consistent Results for a GaAs/Al1-xGaxAs Heterojunction: I. Subband Structure and Light-Scattering Spectra”, Jpn. J. Phys. Society, vol. 51, p. 3893, 1982.

[82] T. Ando, “Self-Consistent Results for a GaAs/Al1-xGaxAs Heterojunction: II. Low Temperature Mobility”, Jpn. J. Phys. Society, vol. 51, p. 3900, 1982.

[83] D. Theron, H. J. Bulmann and M. Ilegems, “Pseudo Two-Dimensional Simulation of a Three Heterojunction GaAs/AlGaAs MODFET”, Solid-State Electron., vol. 33, p. 1607, 1990.

[84] J. Yoshida, “Classical versus Quantum Mechanical Calculation of the Electron Distribution at the n-AlGaAs/GaAs Heterointerfaces”, IEEE Trans. Electron Devices, vol. 33, p. 154, 1986.

[85] H. K. Brown, A. G. Whittaker and N. T. Rollins, “A Numerical Analysis of the Resonant States Quantum Well and Superlattice Devices”, Solid-State Electron., vol. 33, p. 333, 1990.

[86] R. Dingle, H. L. Stormer, A. C. Gossard and W. Wiegmann, Appl. Phys. Lett., vol. 33, p. 665, 1978.

[87] E. Burstein, A. Pinczuk and D. L. Mills, Surf. Sci., vol. 98, p. 451, 1980.

[88] C. S. Chang and H. R. Fetterman, “An Analytic Model for High Electron Mobility Transistors”, Solid-State Electron., vol. 30, p. 485, 1987.

[89] L. D. Nguyen, L. E. Larson and U. K. Mishra, “Ultra-High-Speed Modulation-Doped Field-Effect Transistors: A Tutorial Review”, Proc. IEEE, vol. 80, p. 494, 1992.

[90] S. Piotrowicz, C. Gaquiere, B. Bonte, E. Bourcier, D. Theron, X. Wallart and Y. Crosnier, “Best Combination between Power Density, Efficiency, and Gain at V-Band with an InP-Based PHEMT Structure”, IEEE Microwave and Guided Wave Lett., vol. 8, p. 10, 1998.

[91] M. Matloubian, A. S. Brown, L.D. Nguyen, M. A. Melendes, L. E. Larson, M. J. Delancey, J. E. Pence, R. A. Rhodes, M. A. Thompson, and J. A. Henige, “ High-Power V-band AlInAs/GaInAs on InP HEMTs”, IEEE Electron Device Lett., vol. 14, p. 188, 1993.

[92] J. S. Su, W. C. Hsu, D. T. Lin, W. Lin, H. P. Shiao, Y. S. Lin, J. Z. Huang and P. J. Chu, ”High-Breakdown Voltage Al0.66In0.34As0.85Sb0.15/In0.75Ga0.25As/InP Heterostructure Field-Effect Transistors”, Electron. Lett., vol. 32, p. 2095, 1996.

[93] J. S. Su, W. C. Hsu, W. Lin and S. Y. Jain, “High-Breakdown Characteristics of the InP-Based Heterostructure Field-Effect Transistors”, IEEE Electron Device Lett., vol. 13, p. 123, 1998.

[94] J. J. Brown, A. S. Brown, S. E. Rosebaun, M. Matloubian, L. E. Larson, M. A. Melendes and M. A. Thompson, ”Study of the Dependence of Ga0.47In0.53As/ AlxIn1-xAs Power HEMT Breakdown Voltage on Schottky Layer Design and Device Layout”, 51st Device Research Conference, June, 1993, Santa Barbara, CA, USA.

[95] M. Matloubian, L. D. Nguyen, A. S. Brown, L. E. Larson, M. A. Melends and M. A. Thompson, “High Power and High Efficiency AlInAs/GaInAs on InP HEMT’s”. IEEE MTT-S Symposium, 1991, Conference Digest, p. 721.

[96] J. B. Boos and W. Kruppa, “InAlAs/InGaAs/InP HEMT’s with High Breakdown Voltage Using Double-Recess Gate Process”, Electron. Lett., vol. 27, p. 1909, 1991.

[97] Y. C. Pao, C. K. Nishimoto, R. Majidi-Ahy, J. Archer, N. G. Bechtel and J. S. Harris Jr., “Characterization of Surface-Undoped In0.52Al0.48As/In0.53Ga0.47As/InP High Electron Mobility Transistors”, IEEE Trans. Electron Devices, vol. 37, p. 2165, 1990.

[98] J. Dickmann, H. Dambkes, H. Nickel, R. Losch, W. Schlapp, Y. H. Zhang, J. Bottcher and H. Kunzel, “Influence of a Surface Layer on dc- and rf-performance of AlInAs/GaInAs HFET’s”, 3rd International Conference on InP and Related Materials, Apr. 1991, Wales, UK, p.292.

[99] J. Dickmann, K. Riepe, H. Haspeklo, B.Maile, H. Daembkes, H. Nickel, R. Losch and W. Schlapp, “Novel Fabrication Process for Si3N4 Passivated InAlAs/InGaAs/InP HFET’s”, Electron. Lett., vol. 28, p. 1849, 1992.

[100] M. Matloubian, L. M. Jelloian, M Lui, T. Liu, L. E Larson, L. D. Nguyen and M. V. Le, “GaInAs/InP Composite Channel HEMT’s”, 51st Device Research Conference, June, 1993, Santa Barbara, CA, USA.

[101] K. B. Cough, B. W. P. Hong, C. Caneau, J. I. Song, K. I. Jeon, S. C Hong and K. Lee, “High-Performance InP-Based HEMT’s with a Graded Pseudomorphic Channel”, IEDM, 1993, Conference Digest, p. 229.

[102] A. S. Brown, C. S. Chou, M. J. Delaney, C. E. Hooper, J. F. Jensen, L. E. Larson, U. K. Misura, L. D. Nguyen and M. S. Thompson, “Low-Temperature Buffer AlInAs/GaInAs on InP HEMT Technology for Ultra-High-Speed Integrated Circuits”, Proc. IEEE GaAs IC Symposium, 1989, p. 143.

[103] A. Fathmulla, J. Abrahams, T. Loughran and H. Hier, “High Performance InAlAs/InGaAs HEMT’s and MESFET’s”, IEEE Electron Device Lett., vol. 9, p. 328, 1988.

[104] S. Bahl and J. A. del Alamo, ”Elimination of Mesa-Sidewall Gate-Leakage in InAlAs/InGaAs Heterostructures by Selective Sidewall Recessing”, IEEE Electron Device Lett., vol. 13, p. 195, 1992.

[105] S. R. Bahl, M. H. Leary and J. A. del Alamo, “ Mesa-Sidewall Gate-Leakage in InAlAs/InGaAs HFET’s”, IEEE Trans. Electron Devices, vol. 39, p. 2037, 1992.

[106] E. J. Martinez, M. S. Shur and F. L. Schuermeyer, “Analytical Gate Current for N-Channel Heterostructure Field-Effect Transistors”, IEEE Trans. Electron Devices, vol. 45, p. 2116, 1998.

[107] G. E. Bullman, T. E. Zipperian and L. R. Dawson, “Impact Ionization Coefficients in In0.2Ga0.8As/GaAs Strained-Layer Superlattices”, Appl. Phys. Lett.., vol. 49, p. 212.

[108] S. Sassen, B. Witzigmann, C. Wolk and H. Brugger, ”Barrier Height Engineering on GaAs THz Schottky Dodes by Means of High-Low Doping, InGaAs- and InGaP-Layers”, IEEE Trans. Electron Device, vol. 47, p. 24, 2000.

[109] N. V. Drozdovski and R. H. Caverly, ” GaN-Based High Electron-Mobility Transistors for Microwave and RF Control Applications”, IEEE Trans. Microwave Theory and Techniques, vol. 50, p. 4, 2002.