在當今的深度神經網路(DNN)的發展中，矩陣乘法是深度神經網路中的主要運算，因此透過研究與設計矩陣乘法對於提高DNN的執行效能至關重要。為此本文提出了一種可重構的矩陣乘法管線化加速器，透過矩陣分塊(Tiling)，管線化執行等方法提升矩陣乘法的運算效率。首先，本文在加速器的設計上引入了分塊(Tiling)執行策略。通過將輸入矩陣切分成小塊進行計算，從中利用局部性原理，提高數據的重複使用和緩解存儲壓力。其次，本文在設計中採用了管線化技術。通過將操作流程劃分為多個階段並同時進行，我們能夠實現高效的並行處理，從而提高整體的計算效率。管線化還可以減少指令之間的等待時間，使加速器能夠更有效地利用資源。接著是引入了一個NN指令集架構，專門針對神經網路操作進行優化。這種指令集提供了高效的矩陣乘法指令，使得加速器能夠有效地執行DNN中的乘積累加運算。

In the current development of deep neural networks (DNNs), matrix multiplication plays a crucial role as a fundamental operation. Therefore, research and design of efficient matrix multiplication techniques are essential for enhancing the execution performance of DNNs.
Therefore, this paper presents a Reconfigurable Matrix Multiplication Pipelined Accelerator to enhance the execution efficiency of Deep Neural Networks (DNNs). The design incorporates matrix tiling, utilizing localized computation for improved data reuse and storage relief. Additionally, pipelining is employed, dividing the operation flow into multiple stages for efficient parallel processing and reduced waiting time between instructions.
Furthermore, a dedicated NN instruction set architecture is introduced, optimized for neural network operations, enabling the accelerator to efficiently perform matrix multiplication tasks in DNNs. In summary, the proposed accelerator significantly improves the computational efficiency of matrix multiplication operations in DNNs, contributing to the advancement of IC design for deep learning applications.

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