在本論文中，我們成功的研製一系列改善砷化銦鋁/砷化銦鎵異質結構高電子移動場效電晶體扭結效應的方法。藉由不同銦含量的通道及製程的改變，完整的探討其對元件特性的影響。
首先我們插入磷化銦的蝕刻阻擋層在砷化銦鋁蕭特基層之上來改善砷化銦鋁上的表面陷阱及減緩扭結效應。因為增加載子傳輸能力及增加產生衝擊游離化的臨界電場值在順向漸變式通道，有順向漸變式通道的電晶體展示更高的異質轉導質為342 mS/mm、電流驅動能力為360mA/mm、尖峰的閘極漏電流 為2.0 uA/mm、輸出轉導值為3.9 mS/mm、電壓增益值為94.2、輸出功率為12.43 dBm及良好的溫度穩定特性。
然後，我們研製通道銦組成為0.425之δ-摻雜的砷化銦鋁/砷化銦鎵變晶結構高電子移動場效電晶體。相較於銦組成為0.53的砷化銦鎵通道，銦組成為0.425的砷化銦鎵通道具有較大的能隙，因此可以降低通道中衝擊游離的現象，減緩扭結效應，同時可獲得較大的閘－源極兩端的崩潰電壓為 -19.2 V、較低的輸出電導為0.73 mS/mm、較佳的電壓增益為402。在操作頻率為5.8 GHz時，可獲得小訊號功率增益為21.05 dB，飽和輸出功率為18.28 dBm (336 mW/mm)，最大功率附加效率為41.4 %。另外此研究的元件也展示良好的特性當溫度升到500 K時。
為了使元件更能適用於高頻率的應用上，我們進一步研製銦組成為更高之漸變式通道的δ-摻雜砷化銦鋁/砷化銦鎵變晶結構高電子移動場效電晶體。由於高銦組成的砷化銦鎵通道具有較窄的能隙，所以載子有較佳的傳輸特性，進而改善元件的轉導值及高頻特性。我們研製利用氮化矽表面鈍化層及雙重閘極凹進的方式來改善元件的扭結效應。氮化矽鈍化層主要影響是有效地減少表面再結合中心並壓制電子誘捕在表面狀態之內，元件特性表現出減緩扭結效應和閘極漏電流。因此,利用氮化矽表面鈍化層及雙重閘極凹進的技術使元件特性達到異質轉導為441 mS/mm、輸出電導為 6.3 mS/mm、電壓增益為69、單位電流增益截止頻率為61GHz、最大振盪頻率為108GHz、輸出功率為 18.91 dBm、元件三階線性點為28.1 dBm。
除了藉由氮化矽表面鈍化層及雙重閘極凹進的方式之外，我們也藉經由臭氧水處理直接氧化砷化銦鋁來改善扭結效應。此閘極氧化製程提供一個低成本方法來形成大約8 nm氧化層並且有良好的表面平坦度在金氧半電晶體閘極結構。在經臭氧處理及未處理相比較下，經由臭氧處理的呈現出減少閘極漏電流為12.9 μA/mm、改善閘極電壓擺幅為0.9 V、輸出電導為4.5 mS/mm、電壓增益為80.5、崩潰電壓為-14.9 V、輸出電壓為18.34 dBm、元件三階線性點為 26.1 dBm。

In this dissertation, we have successfully fabricated and investigated InAlAs/InGaAs high electron mobility transistors (HEMT’s) by employing different InxGa1-xAs channel designs and fabrication processes to improve the breakdown voltage and power characteristics.
First, an InP etch stop layer was inserted on top of the InAlAs Schottky layer to improve the surface traps on the InAlAs layer and to alleviate the kink effects. Because increasing the carrier transport property and the threshold field for impact ionization in a linearly-graded channel structure, the LGC-HEMT has demonstrated high device gain of 342 mS/mm, high current drive capability of 360 mA/mm, low gate leakages of -2.0 μA/mm at VDS = 2V, low output conductance of 3.9 mS/mm, high voltage gain of 94.2, high output power of 12.43 dBm, and good thermal stability, as compared to those of the LMC-HEMT and ILGC-HEMT, respectively.
Then, we’ve investigated the double -doped In0.425Al0.575As/In0.425Ga0.575As MHEMT’s. Since the energy band-gap of In0.425Ga0.575As channel is wider than that of the In0.53Ga0.47As channel in lattice-matched InP HEMT devices, the impact ionization phenomenon within the channel is expected to be reduced, thus relieving the kink effects. Consequently, the proposed double -doped MHEMT has shown low output conductance of 0.73 mS/mm, improved gate-drain breakdown voltage of -19.2 V, voltage gain of 402 and saturated output power of 18.28 dBm. Besides, the proposed MHEMT has also demonstrated superior high-temperature performance up to 500 K with positive thermal threshold coefficient (Vth/T) of 0.39 mV/K.
To facilitate the high-frequency applications, we have further investigated a -doped In0.45Al0.55As/InxGa1-xAs MHEMT by using a linearly-graded InxGa1-xAs (0.63→0.53) channel. Due to the high indium composition of the InxGa1-xAs channel, better carrier transport characteristics have been obtained to improve the transconductance and high-frequency characteristics. We have used the SiNx surface passivation and double-recess techniques to relieve the above-mentioned kink effects. Therefore, the propose MHEMT device has improved the extrinsic transconductance (gm) from 419 to 445 mS/mm, breakdown voltage from -7.7 to -13.1 V, output conductance (gd) from 17.7 to 6.3 mS/mm, voltage gain (AV) from 29 to 69, cut-off frequency (ft) from 55 to 61 GHz and maximum oscillation frequency (fmax) from 92 to 108GHz, the output power (Pout) from 14.33 to 18.91 dBm and the third-order intercept point (OIP3) from 19.3 to 28.2 dBm at 300 K, respectively. In addition, the device with double gate-recess has also demonstrated improved thermal stability with the deviations of gm,max and ID,max from 300 K to 500 K are only 18.8 % and 12.6 %, respectively.
In addition to using the SiNx surface passivation and double-recess techniques, we’ve further investigated to relieving kink effects by using the ozone water oxidation treatment. The gate oxidation process provides a cost-effective method to deposit an about 8-nm thick oxide film with superior surface flatness in the gate structure of the MOS-MHEMT. In comparison, the proposed MHEMT with the ozone treatment has demonstrated improved peak gate leakage density from 59.5 μA/mm to7.1 μA/mm, breakdown voltage (BVGD) from -5.8 V to -14.9 V, output conductance (gd) from 33.1 to 4.5 mS/mm, voltage gain (Av) from 11.7 to 80.5, gate-voltage swing (GVS) from 0.45 to 0.9 V, output power (Pout) from 13.43 to 18.34 dBm and OIP3 from 15.8 to 26.1 dBm at 300 K, respectively.

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