本論文針對目前主要應用於切換式降壓轉換器的適應性電壓位置(AVP)技術進行介紹，讓目前的線性及漣波控制AVP得以清楚地被了解與分類，並根據「成本」及「變頻及誤差」分別提出二種不同的固定導通時間AVP控制實現例子：「具AVP機制之低成本適應導通時間控制切換式降壓轉換器」及「使用無感測電流變頻校正技術及動態視窗機制之適應導通時間控制AVP切換式降壓轉換器」。
第一個實例主要是針對目前固定導通時間控制AVP文獻已出現的架構之成本考量，提出架構改善讓系統可以得到進一步的效能提升及降低成本。有別於傳統固定導通時間控制AVP由誤差放大器路徑進行輸出阻抗補償，「具AVP機制之低成本適應導通時間控制切換式降壓轉換器」實例改由電流感測濾波器端補償輸出阻抗，省去了誤差放大器的使用進一步地提升效能及降低設計成本，恢復漣波控制本來所具有的優勢，另外提出一極輕載音頻防止保護電路。量測結果證明此系統具有優異的暫態能力，回復時間只有4μs。對於輸入電壓的變頻現象也控制在僅±0.66%上下，最高效能可達到90.1%。
第二個實例則是為了證明論文所提出的定頻技術「無感測式電流變頻校正技術」(Sensorless Load Current Correction, SLCC)。提供一套定頻的參考設計流程且無需使用耗能的電流感測電路，使漣波控制系統能達到「準定頻」的好處，降低後端電路濾波器的設計成本。量測結果證明，在負載電流為150mA到1000mA的範圍下，比起傳統用在COT控制上的減緩變頻技術，所提出的SLCC技術可有效地減緩對負載電流的變頻範圍至相當優異的±2.6%，有大約60%幅度的改善。當操作於輸入電壓2.7V且負載電流為150mA時可達到最高效能88.2%。
本論文實現的兩種漣波控制AVP，皆依照所提出的設計方式，使用TSMC 0.18 μm CMOS Mixed Signal 1P6M 1.8&3.3V製程進行模擬並透過國家晶片系統設計中心(CIC)下線，並皆有完整的晶片量測結果。

This thesis focuses on the study and design of Adaptive Voltage Positioning (AVP) technique and also the introduction and classification of linear and ripple based control AVP. According to the requirements of “cost” and “frequency variation and dc output offset”, this thesis proposed two different constant on-time control converter systems：“A Low-cost AOT(Adaptive On-Time)-Controlled Buck Converter with AVP Mechanism” and “Sensor-less Load Current Correction (SLCC) and Dynamic Tolerance Window (DTW) Techniques for AOT-Controlled AVP Buck Converter”.
The goal of the first implementation is the high cost consideration of the existing constant on-time control AVP architectures. This thesis proposed a novel architecture which is low-cost and high efficiency. Instead of using error amplifier with external componenets to achieve the constant Zoc, “A Low-cost AOT-Controlled Buck Converter with AVP Mechanism” compensates Zoc with the aid of the current-sensing RC filter across the inductor. Without using error amplifier and extra external componenets, the proposed AOT AVP preserves the simple low-cost nature of the ripple-based control. For ensuring the system’s switching frequency not entering the range of acoustic frequency at light load, an AEAF (avoid entering acoustic frequency) circuit is also proposed. Experimental results show excellent transient recovery time of 4μs (under AVP mode), ±0.66% switching frequency variation (for the specified input voltage range), and 90.1% peak conversion efficiency.
The other IC implementation focused on the frequency variation characteristic of ripple-based control. Sensor-less load current correction (SLCC) and dynamic tolerance window (DTW) techniques are proposed in this thesis to reduce the frequency variation due to conduction losses without employing complicated circuits such as PLL or current sensors. Experimental results show that the switching frequency variation has about 60% improvement over the traditional techniques in constant on-time control when the load current changes from 150mA to 1000mA. The measurement results also show that the frequency variation across the whole input/output and loading ranges can be reduced to only ±2.6%. The maximum power efficiency is 88.2% at 150mA with 2.7V input voltage.
Both of the two proposed ripple-based control AVP system was fabricated with standard 0.18μm CMOS process with the aid of CIC. The complete chip measurement results are shown in this thesis.

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