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研究生: 王瑞汛
Wang, Ruei-Syun
論文名稱: 主動區間干擾消除演算法之低複雜度設計與實現
Low Complexity Design and Implementation of Active Interference Cancellation
指導教授: 郭致宏
Kuo, Chih-Hung
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2009
畢業學年度: 97
語文別: 中文
論文頁數: 67
中文關鍵詞: 軟硬體共同設計偵測與躲避演算法主動消除區間干擾感知無線電
外文關鍵詞: Active interference cancellation, Hardware software co-design, Detection and avoidance., Cognitive radio
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  • 本論文提出低複雜主動消除區間干擾演算法之軟硬體架構,且利用軟硬體共同設計的概念,設計整體演算法架構。我們以減少LS estimate運算次數來簡化主動消除區間干擾演算法,並且進一步提出硬體架構。演算法將分為軟硬體兩部份,其中較複雜且無規則性為軟體部分,相反的將具有規則性的部份則為硬體,實現方式軟體部分是以MATLAB實現,硬體方式是以FPGA實現,並且利用Verilink作為FPGA和MATLAB之間溝通的介面,以達到軟硬體共同驗證。利用硬體加速的方式提升整體演算法運算速度。硬體面積僅1039 gates,整體效能可以達到約-40dB的帶拒能力。

    The thesis presents hardware/software architecture and implementation of low complexity active interference cancellation. Hardware/software co-design methodology was used to design architecture. We reduce the computational time of LS estimate that to simplify active interference cancellation. We also proposed hardware structure for LS estimate. The algorithm has been separated two parts. The regular part is hardware and the other part is software. The software part was carrier our MATLAB, and hardware was implement by FPGA board. Verilink apply communication interface between FPGA with Matlab, therefore we use Verilink to complete hardware/software co-verification. We used hardware accelerate methodology to promote speed of algorithm. Proposed hardware structure only 1039 gates, which is very low cost. Our architecture have to -40dB notch depth.

    目錄 1 介紹 1.1 研究動機.......................... 1 1.2 應用............................ 3 1.3 貢獻............................ 4 1.4 論文架構.......................... 4 2 研究背景 2.1 軟體定義無線電 .......................6 2.1.1 軟體無線電之特色....................7 2.1.2 不同級別的軟體無線電設備................7 2.1.3 軟體無線電的運作架構..................9 2.2 感知無線電.........................10 2.2.1 感知無線電的特色 ...................11 2.2.1.1 頻譜感知....................11 2.2.1.2 動態化頻譜分配.................12 2.2.1.3 抗干擾技術...................12 2.2.2 以軟體無線電為核心技術的感知無線電架構 ........13 2.2.3 軟體無線電處理器 ...................14 2.2.4 商品化的軟體無線電架構................15 2.2.5 感知無線電之應用、發展與目標 .............17 2.3 偵測與躲避演算法......................18 2.3.1 偵測演算法 ......................19 2.3.2 躲避演算法 ......................20 2.3.3 偵測與躲避演算法之發展 ................22 2.4 主動干擾消除演算法.....................23 2.4.1 發展主因.......................23 2.4.2 主動干擾消除演算法之技術介紹.............24 2.4.3 主動干擾消除演算法之優缺點分析............27 2.5 FPGA硬體驗證版相關規格與特色分析.............27 2.5.1 SMIMS VeriEnterprise.................28 2.5.2 Virtex-4 FPGA的性能及應用 ..............29 3 低複雜度主動干擾消除演算法設計與實現 3.1 設計概念......................... 33 3.2 低複雜度主動干擾消除演算法................ 34 3.3 軟/硬體劃分........................40 3.4 提出的演算法....................... 41 3.5 提出的硬體架構...................... 46 3.6 實現流程......................... 51 4 模擬結果 4.1 模擬環境......................... 53 4.2 模擬流程與實作方法.................... 54 4.3 分析複雜度與效能..................... 57 4.4 結果與討論........................ 61 5 結論與展望 5.1 結論........................... 63 5.2 未來展望......................... 65 參考文獻..............................66

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