| 研究生: |
許晉維 Hsu, Chin-Wei |
|---|---|
| 論文名稱: |
使用電荷平衡控制技術之數位雙迴路降壓型轉換器 Digital Dual-Loop Buck Converter Using Charge-Balance Control Technique |
| 指導教授: |
蔡建泓
Tsai, Chien-Hung |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2018 |
| 畢業學年度: | 106 |
| 語文別: | 中文 |
| 論文頁數: | 98 |
| 中文關鍵詞: | DC-DC降壓型轉換器 、功率級設計流程 、數位控制 、雙迴路控制 、電荷平衡控制技術 、快速暫態響應 |
| 外文關鍵詞: | DC-DC Buck converter, Power state design flow, Digital control, Dual-loop control, Charge balance control technique, Fast transient response |
| 相關次數: | 點閱:83 下載:2 |
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本論文研究題目為使用電荷平衡控制技術之數位雙迴路降壓型轉換器,詳細探討了降壓型轉換器其功率級元件與系統規格的變化對於暫態行為的影響,並提出一套功率級設計流程幫助設計者制定出合適的參數,目的使系統穩態以及暫態效能能夠符合設計者所預期的規格。
此外,倘若設計者的預期規格太過嚴峻而功率級設計流程無法訂定出參數時,意謂著系統必須藉由加速暫態機制來解決,因此本論文整理快速暫態相關的類比與數位研究文獻,並針對系統架構進行分類與比較優缺點,得出使用電荷平衡控制技術相較於一般常見的線性控制(單迴路控制)來說能使暫態效果有卓越的提昇。
本論文作品根據此技術並設計數位雙迴路降壓型轉換器,其保留單迴路控制的零穩態誤差優點並在暫態時切換至電荷平衡控制抑制輸出電壓振幅變化並快速回復到系統穩態,架構實現上只需要回授用的電壓ADC,大大降低硬體成本與ADC所消耗的能量,最後以FPGA為實驗平台並進行系統驗證與量測,證明透過雙迴路控制技術能大幅度改善系統的暫態性能,與單迴路控制系統相比在性能上提昇了70%。
The topic of this thesis is a digital dual-loop buck converter using charge balance control technology. We discuss the influence of the changes by power stage components and system specifications on the transient behavior of the buck converter in detail, then propose a power stage design flow. It can help the designer to choose appropriate parameters to meet the designer expected system’s steady state and transient specifications.
In addition, if the designer's expected specifications are too severe then the power stage design flow cannot determine parameters, it means that the specification must be achieved by the accelerated transient mechanism. Therefore, this thesis collates many paper about fast transient of analog and digital control. Analyze system control methods and compare advantages and disadvantages. It is concluded that the use of charge balance control technology can achieve an excellent improvement in transient effects compared to the usual single-loop control(linear control).
According to this technology, this thesis designs a digital dual-loop buck converter, which retains the advantages of zero-state error of single-loop control and switches to charge balance control in transient state to suppress output voltage amplitude variation and quickly return to system steady state. The overall architecture implementation requires only one voltage feedback ADC, which greatly reduces the hardware cost and the energy consumed. Finally, using FPGA as the experimental platform and performing system verification and measurement, it is proved that the dual-loop control technology can greatly improve the transient performance of the system, and the performance is improved by 70% compared with the single-loop control system.
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校內:2023-07-01公開