本論文研究題目為高效率低成本數位控制適配器，詳細探討了低成本一次側感測方式及高效率準諧振切換於類比文獻實現做法，再從類比研究議題中帶入數位化研究現況，並說明數位與類比實現差異。本論文作品根據研究結果設計一數位式一次側回授及準諧振切換之數位返馳式控制器，具輸出電壓控制及過電流保護，符合現行手機適配器功用與規格標準，所實現之數位準諧振軟切技術能改善傳統開關硬切下切換損於輕載過高問題，如此可提高系統平均效率達到本論文高效率研究目的，最後以FPGA系統完成控制驗證與系統量測。
本論文作品貢獻為針對適配器一次側感測於輸出電流控制下因傳輸延遲關係造成峰值電流誤差，提出一種新型數位峰值電流延遲補償方法，可解決於不同輸入電壓大小下限電流漂移問題，相比目前數位文獻實現方式，透過本作品所提出之兩週期平均補償(Two-Cycle-Averaged Compensation)可以降低數位硬體實現成本，並且不失補償效果，最後本作品電流誤差量測結果為±1.6%，符合目標規格±5%。

In this paper, the research topic is a high efficiency and low cost digital control adapter, which discusses the low-cost Primary-Side Regulation (PSR) for Output Voltage and Current, and the high-efficiency Quasi-Resonant (QR) Soft Switching control. Based on the research results, this paper designed a digital PSR QR Flyback controller. It has output Constant Voltage (CV) control and Over-Current Protection (OCP), which conforms to the nowadays efficiency standard and application of mobile phone USB adapter. Finally, the controller realized by FPGA and completed system verification.
This paper proposed novel digital peak current delay compensation method which named as Two-Cycle-Averaged that can solve current variation by the difference of universal input voltage in OCP issues, which is the peak current error problem caused by the Propagation Delay under the output current control. This work can reduce the cost of digital hardware, and without losing the compensation effect. Finally the voltage and current error measurement results of this work are ± 1% and ± 1.6%, which reached the target error within 5%.

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