本論文主要介紹現今功率因數修正技術。從功因修正器發展背景與研究動機，到各式功因修正技術的原理與架構，針對不同控制方法的實現探討其優劣。本論文使用非線性載波控制法實作，藉由非線性載波控制本身無須偵測輸入電壓資訊之優勢，使控制迴路設計相較於其他電流模式控制法(例如:平均電流控制法)簡單。且詳細的介紹此控制法於電壓迴路與電流迴路兩端的演算法設計與運作流程，並針對連續導通模式與不連續導通模式下，提出改善總諧波失真問題的解決方案。
本論文以數位方式實現，控制迴路以Verilog撰寫，並以Altera DE2-115 FPGA開發板實作，並搭配自行設計PCB電路板完成功率級與外掛元件，共同達到系統閉迴路驗證。最後以實驗室自行設計的類比數位轉換器取代外掛IC AD7822，並驗證取代後系統仍正確運作。本論文可實際操作於廣輸入電壓範圍(90~264 Vac)，並且達到功因值0.982，最低的總協波失真7%，且轉換效率可以達到97%，輸出功率100瓦之昇壓型功率因數修正器。

This paper proposed a power factor correction technology nowadays. It introduces the power factor correction from the background and motivation to the various operation principles and power stage architectures. Focus on different controls, analysis the pros and cons. This paper proposed a digital nonlinear-carrier control (NLC) power factor correction technique that requires no input voltage sensing and the controller design is easier than other control (ex. Average current control). It introduces the voltage and current loop algorithm mechanism and operation flow in detail, and proposed a solution for improved the total harmonic distortion (THD) operated under the continuous conduction mode (CCM) and discontinuous conduction mode (DCM).
Using the digital control to achieved this controller, and realized by FPGA(Altera DE2-115) in Verilog RTL. And with PCB design by myself, achieved the power stage architectures and plug-in elements completely. With the FPGA and PCB co-simulation to achieved closed-loop system verification. Finally, using the analog-to-digital converter by laboratory designed to replace the plug IC AD7822, and verify the system is still functioning properly.
The system operates in wide input voltage range(90~264 Vac), and experimental results are shown for high power factor of 0.982, minimum of 7% total harmonic distortion and maximum of 97% efficiency in a 100W boost power factor correction(PFC).

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