在本篇論文中，研究H.264/AVC視訊解碼器移植到雙核心嵌入式平台後，針對處理器的特性來對視訊解碼器的核心演算法做最佳化，以內嵌有進階精簡指令集機器(ARM)和數位訊號處理器(DSP)的嵌入式平台為例，來探討此嵌入式軟體優化的技術。
將視訊解碼器移植到ARM嵌入式平台後，由於大量的記憶體存取和複雜的演算法，導致整體解碼效能不佳的主因。為了克服這問題，我們提出軟體優化技巧來優化H.264/AVC視訊解碼器的解碼流程，並將H.264/AVC視訊解碼器中的核心演算法交給DSP去處理，並針對DSP處理器的特性對演算法做最佳化，使DSP處理器可以發揮最大的效能。而且，為了減少多餘的運算，我們判斷離散餘弦轉換(DCT)後的係數對H.264/AVC視訊解碼器中的離散餘弦逆轉換(IDCT)之矩陣運算做化簡。最後，我們使用多執行緒機制來達成兩個核心之間的平行處理，以增加整體系統的解碼效率。
根據移植到雙核心嵌入式平台的實驗結果顯示，我們所提出的軟體優化方法可以改善嵌入式系統上之視訊解碼器的效能。

In this thesis, we focus on the algorithm optimization based on the feature of processor after the implementation of H.264/AVC decoder on dual-core embedded system. We use the dual-core embedded platform with ARM and DSP processors for example to illustrate the software optimization. The performance of video decoder is not good on ARM embedded system. The major problems are the amount of memory access and high computational complexity. To overcome these problems, we proposed several optimization techniques to optimize the decoding flow of H.264/AVC. Moreover, the main algorithms of H.264/AVC are excuted using DSP core. In order to reduce the redundant computaition, we simplify the matrix computation of inverse transform based on detecting nonzero DCT coefficients. Finally, we apply a modified H.264/AVC decoder on a dual-core embedded system with parallel processing based on multithread technique. Through these methods, the decoding efficiency of H.264/AVC is improved. Simulation results on the dual-core embedded system show that our proposed methods can actually improve the decoding efficiency of H.264/AVC decoder.

[1] T. Wiegand, G.J. Sulivan, G. Bjntegaard, and A. Luthra, “Overview of the H.264/AVC video coding standard,” IEEE Trans. Circuit Syst. Video Tech., vol. 13, no. 7, pp. 560-576, July 2003.
[2] http://www.ti.com.tw
[3] Texas Instrument Inc., “TMS320DM6446 Digital Media System-on-Chip,” Literature Number: SPRS283F, Dec. 2005.
[4] M. Horowitz, A. Joch, F. Kossentini, and A. Hallapuro, “H.264/AVC baseline profile decoder complexity analysis,” IEEE Trans. Circuit Syst. Video Tech., vol. 13, no. 7, pp. 715-727, July 2003.
[5] P. Li, Y. Lu, H. Wei, and S. Li, “Realization of embedded multimedia system based on dual-core processor OMAP5910,” IMACS CESA, Oct. 2006, pp. 85-91.
[6] Texas Instrument Inc., “TMS320DM644x DMSoC ARM Subsystem Reference Guide,” Literature Number: SPRUE14B, Mar. 2009.
[7] Texas Instrument Inc., “Codec Engine Algorithm Creator User’s Guide,” Literature Number: SPRUED6C, Sep. 2007.
[8] Texas Instrument Inc., “Codec Engine Server Integrator User's Guide,” Literature Number: SPRUED5B, Sep. 2007.
[9] Texas Instrument Inc., “Codec Engine Application Developer User's Guide,” Literature Number: SPRUE67D, Sep. 2007.
[10] Texas Instrument Inc., “xDAIS-DM (Digital Media) User Guide,” Literature Number: SPRUEC8B, Jan. 2007.

[11] POSIX thread (pthread) libraries. Available online at: http://www.yolinux.com/TUTORIALS/LinuxTutorialPosixThreads.html
[12] Texas Instrument Inc., “TMS320C6000 Programmer’s Guide,” Literature Number: SPRU198I, Mar. 2006.
[13] X. Zhou, E. Q. Li, and Y. K. Chen, “Implementation of H.264 decoder on general-purpose processors with media instructions,” in Proc. SPIE Symp. Image and Video Commun. and Processing, May 2003, pp. 224-235.
[14] J. Lee, S. Moon, and W. Sung, “H.264 decoder optimization exploiting SIMD instructions,” in Proc. Circuits and Syst., IEEE Asia-Pacific Symp., Dec. 2004, pp. 1149-1152.
[15] S. Warrington, H. Shojania, and S. Sudharsanan, “Performance improvement of the H. 264/AVC deblocking filter using SIMD instructions,” IEEE Int. Symp. Circuits Syst., Sep. 2006, pp. 2697-2700.
[16] P. P. Dang, “An efficient implementation of in-loop deblocking filters for H.264 using VLIW architecture and predication,” in Proc. IEEE Int. Symp. Consumer Electron., Jan. 2005, pp. 291-292.
[17] F. Pescador, C. Sanz, M. J. Garrido, C. Santos, and R. Antoniello, “A DSP based IP set-top box for home entertainment,” in Proc. IEEE Int. Symp. Consumer Electron., vol. 52, pp. 254-262, Jan. 2006.
[18] F. Pescador, M. J. Garrido, C. Sanz, E. Juarez, A. M. Groba, and D. Samper, ”A real-time H.264 BP decoder based on a DM642 DSP”, Int. Symp. Signal Process. Commun., Nov. 2007, pp. 1491-1494.
[19] F. Pescador, C. Sanz, M. J. Garrido, E. Juarez, and D. Samper, “A DSP based H.264 decoder for a multi-format IP set-top box,” IEEE Trans. Consumer Electron., vol 54, pp. 145-153, Feb. 2008.
[20] F. Pescador, G. Maturana, M.J. Garrido, E. Juarez, and C. Sanz, “An H.264 video decoder based on a DM6437 DSP,” in Proc. IEEE Int. Symp. Consumer Electron., May 2009, pp. 1-2.
[21] F. Pescador, G. Maturana, M. J. Garrido, E. Juarez, and C. Sanz, “An H.264 video decoder based on a latest generation DSP,” IEEE Trans. Consumer Electron., vol. 55, no. 1, pp. 205-212, Feb. 2009.
[22] Texas Instruments. TMS320DM642 Video/Imaging Fixed-Point Digital Signal Processor. Available online at:
http://focus.ti.com/docs/prod/folders/print/tms320dm642.html.
[23] Texas Instrument Inc., “EDMA v3.0 (EDMA3) Migration Guide for TMS320DM644x DMSoC,” Literature Number: SPRAAA6, Dec. 2005.
[24] L. Hui, X. Ru, and L. Zhi, “Implementation of H.264 on TMS320DM642,” in Proc. Embedded Software and Syst., July 2008, pp. 605-609.
[25] V. Ramadurai, S. Jinturkar, M. Moudgill, and J. Glossner, “Implementation of H.264 decoder on Sandblaster DSP,” in Proc. IEEE Int. Symp. Multimedia and Expo, July 2005.
[26] Sandbridge Technologies, “Sandblaster DSP Overview”, www.sandbridgetech.com
[27] Y. Moshe and N. Peleg, “Implementations of H.264/AVC baseline decoder on different digital signal processors,” in Proc. 47th Int. Symp. ELMAR, Jun. 2005, pp. 37-40.
[28] H. Chen, R. Hu, and Y. Gao, "An effective method of deblocking filter for H.264/AVC", Int. Symp. Commun. Information Tech., Oct. 2007, pp. l092-1095.
[29] Z. Yang, W. Gao, Y. Liu, and D. Zhao, “Deeply pipelined DSP solution to deblocking filter for H.264/AVC,” IEEE Trans. Consumer Electron., vol. 52, no. 4, pp. 1267-1274, Nov. 2006.
[30] W. C. Lin, “The memory access optimization techniques for video decoders on embedded system platforms,” M.S. thesis, Nat. Cheng Kung Univ., Tainan, Taiwan, Jun. 2009.
[31] Texas Instrument Inc., “DVEVM Getting Started Guide,” Literature Number: SPRUE66, Mar. 2006.
[32] T. M. Liu, W. P. Lee, T. A. Lin and C. Y. Lee, “A memory-efficient deblocking filter for H.264/AVC video coding,” IEEE Int. Symp. Circuits Syst., May 2005, pp. 23-26.