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研究生：	吳蔚邦 Wu, Wey-Bang
論文名稱：	應用在超大型積體電路之串列式低功率匯流排編碼機制 Serial Low-Power Bus Coding Schemes for VLSI
指導教授：	郭致宏 Kuo, Chih-Hung
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2006
畢業學年度：	94
語文別：	英文
論文頁數：	72
中文關鍵詞：	匯流排編碼、超大型積體電路、低功率
外文關鍵詞：	VLSI, low-power, bus coding
相關次數：	點閱：88 下載：1
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在本論文中，我們提出了串列式匯流排的編碼方法，來降低匯流排的轉態因數(switching activity)，並且實作了錯誤控制編碼來降低功率損耗。我們的編碼方法，其主要的精神是不增加匯流排的位元線，對資料進行編碼而降低匯流排的功率損耗，所以我們將額外的資訊位元加在資料封包的後面。第一種編碼方法是串列式位元線編碼 (SLE)，而第二種編碼方法是串列式匯流排反相編碼 (SBI)。我們也提出一般化的串列式位元線編碼 (GSLE)，並且分析它的效能。在我們的實驗中，串列式匯流排反相編碼 (SBI4) 可以節省轉態因數約16%，而串列式位元線編碼 ( SLE(5,4) code ) 可以節省轉態因數約12%。我們也將提出來的編碼方法，應用在一個簡單的AMBA的平台上。實驗結果顯示，我們提出的低功率編碼與未編碼的匯流排相比，可以降低匯流排的功率消耗約5.4%~19%，而且並不需要在匯流排上增加額外的位元線，最後實做出來的錯誤控制碼可以降低匯流排的功率損耗約17% ~ 43%。根據實驗結果，我們提出來的編碼方法，即使匯流排寬度沒有限制的增加，節省的轉態因數仍然可以維持在一個水準。

In this thesis, we present serial coding methods to reduce the switching activity on the bus, and implement the error control codes to reduce the power consumption. The basic principle of our proposed coding method is to append extra information bits to the back of the original data packet without appending redundant bitlines on the bus. The first proposed coding method is serial line encoding (SLE), and the second proposed coding method is serial bus-invert coding (SBI). We also propose the generalized serial line encoding (GSLE), and analyze its performance. The total transition savings of SBI4 coding can save about 16% over uncoded bus, and the total transition savings of SLE(5,4) code can save about 12%. Then we apply the proposed schemes to a simple AMBA-based platform. Experimental results show that the proposed low-power coding schemes can reduce power consumption about 5.4% ~ 19%, compared to that of the uncoded words, without adding redundant bitlines on the bus. The accomplished error control codes can save power consumption about 17% ~ 43% on the bus. According to experimental results, the transition savings of the proposed low-power codes remain the same even if the bus width is increasing without limit.

中文摘要  ......................................................................I
ABSTRACT  .....................................................................II
誌謝  ........................................................................III
LIST OF TABLES  ...............................................................VI
LIST OF FIGURES  .............................................................VII
Chapter 1  Introduction  .......................................................1
1	Research Background  ...................................................1
2	Research Motivation  ...................................................2
3	Organization of Thesis  ................................................4
Chapter 2  Review of Low-Power Bus Coding  .....................................6
1    Coding for Data Bus  ..................................................6
1.1  Bus-Invert Coding  ..................................................6
1.2  Weight-Based Bus-Invert Coding  .....................................8
1.3  Partial Bus-Invert Coding  ..........................................8
1.4  Adaptive Code-Book Method  ..........................................9
1.5  Dynamic Coding Scheme  .............................................10
1.6  Odd/Even Bus-Invert and Two Phase Transfer Methods  ................11
2	Coding for Address Bus  ...............................................11
2.1  Gray code  .........................................................12
2.2  T0 Code  ...........................................................12
3	Error Control Coding  .................................................13
3.1  Hamming Code  ......................................................13
3.2  Reed-Solomon Code  .................................................14
4	A Coding Framework for Address and Data Bus  ..........................16
5	A Unified Framework for Data Bus  .....................................18
Chapter 3  Serial Low-Power Bus Coding  .......................................20
1	Generalized Serial Line Encoding and Its Performance Analysis  ........21
1.1 Algorithm of Generalized Serial Line Encoding  .....................22
1.2 Performance Analysis  ..............................................22
2	Serial Line Encoding(5,4) Code  .......................................26
2.1 Algorithm of Serial Line Encoding(5,4) Code  .......................26
2.2 Hardware Design  ...................................................27
3	Serial Bus-Invert coding  .............................................29
3.1 Algorithm of Serial Bus-Invert Coding  .............................29
3.2 Hardware Design  ...................................................31
4	Serial Error Control Coding  ..........................................34
4.1 Error Model  .......................................................34
4.2 Serial Hamming Code  ...............................................36
4.3 Reed-Solomon Code  .................................................39
4.4 Cyclic Redundancy Code  ............................................44
Chapter 4  Experimental Results	 ..............................................51
1	Numerical Results for Generalized Serial Line Encoding  ...............51
2	Total Transition Savings Over Uncoded Bus  ............................53
3	Simulation Results of Hardware Implement  .............................54
3.1 Bus Model for Deep Sub-Micron Technology  ..........................54
3.2 Verifications of Hardware  .........................................55
3.3 Simulation  ........................................................59
4	Simulation for Simple AMBA-Based Platform  ............................64
4.1 Advanced Microcontroller Bus Architecture  .........................64
4.2 Experimental Environment  ..........................................65
4.3 Simulation  ........................................................68
Chapter 5  Conclusions and Future Work  .......................................69
References  ...................................................................71
                                    

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校內：2007-08-21公開
校外：2008-08-21公開

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