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研究生： 洪韻堯
Hung, Yun-Yao
論文名稱： 間接偵測負載傳送器及可重組串/並接收器之無線傳能系統
A Wireless Power Transfer System with Indirectly Load Estimating Transmitter and Reconfigurable Series/Parallel Receiver
指導教授： 郭泰豪
Kuo, Tai-Haur
學位類別： 碩士
Master
系所名稱： 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年： 2014
畢業學年度： 103
語文別： 英文
論文頁數： 97
中文關鍵詞： 無線傳能 、無線充電 、估測負載 、校正參數 、功率控制 、暫態響應 、可重組 、效率 、Qi
外文關鍵詞： wireless power transfer, wireless charger, load estimating, calibration, power control, transient response, reconfigurable, power transfer efficiency, Qi
相關次數： 點閱：117  下載：5 
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    • 無線傳能已逐漸取代有線傳能系統，例如記憶卡、手機、平板。傳統功率控制利用資訊溝通將負載資訊從接收端傳回傳送端，一筆資訊所花費的時間較長，包括調變、資訊傳遞、解調，導致系統無法應變較快的動態負載。本論文提出間接估測負載傳送器以達到快速負載暫態響應。在每筆資訊溝通的間隔，透過傳送端的電壓電流資訊間接估測接收端的輸出電壓，以達到即時的功率控制，並利用資訊溝通進行估測電路的參數校正。此外，本論文亦提出可重組串/並接收器以達到在各個輸出功率條件下都保持較高的系統效率。
    本論文傳送端晶片使用TSMC 0.35um 2P4M 3.3V/5V混合訊號互補式金氧半導體製程製作，晶片面積為2.448 x 2.490 mm2，傳送端電路設計規格輸入電壓為5±10% V、操作頻率為100±5%kHz。接收端晶片使用TSMC 0.25um 1P5M混合訊號互補式金氧半高壓製程製作，晶片面積為1.574 x 1.900 mm2，接收端的控制電路設計規格輸入電壓為5±10% V。模擬驗證結果在串串共振模式下，負載變動600mA時，系統負載暫態響應僅須1.51ms；串並共振模式下，負載變動500mA時，系統負載暫態響應僅須1.82ms。負載為1W時，效率較傳統架構改善10%；無線傳能系統(傳送端與接收端)整體系統效率將達72.48%。

    Wireless power transfer (WPT) has gradually replaced wire-connected systems, such as memory cards, mobile phones, and tablet computers. A WPT system with conventional power control obtains receiver information through data communication. It spends lots of time, so that it can handle fast load transient. This thesis proposes a WPT system with indirectly load estimating transmitter (ILET) to achieve fast load transient response. A WPT system with ILET can regulate output voltage immediately by estimating load information through the voltage and current in the TX-coil. Furthermore, other relatively constant parameters of estimating equations are calibrated by data communication. In addition, a reconfigurable series/parallel receiver (RSPR) is proposed to maintain high power transfer efficiency (PTE) under all load conditions.
    The transmitter and receiver chips are fabricated with the TSMC 0.35μm CMOS process and the TSMC 0.25μm 5V/40V process respectively. Input voltage of transmitter and receiver chips are 5±10% V and the operating frequency is 100kHz. The area are 2.448 x 2.490 mm2 and 1.574 x 1.900 mm2 respectively. Post-layout verifications show that the load transient response is 1.51ms for 600mA step load transient in series-series topology, 1.82ms for 500mA step load transient in series-parallel topology. In addition, power transfer efficiency can be improved 10% at 1W-load condition with the proposed RSPR. And the maximum power transfer efficiency is 72.48%.

    摘要 I Abstract II Acknowledgements III Table of Contents IV List of Tables VII List of Figures VIII Chapter1 Introduction 1 1.1 Motivation 4 1.2 Organization 5 Chapter2 Fundamentals of Wireless Power Transfer 7 2.1 Basic Analysis of Wireless Power Transfer 7 2.1.1 Typical Architecture of WPT System 8 2.1.2 Equivalent Circuit and Mathematic Model 10 2.1.3 Four Compensated Topologies 11 2.2 Basic Technique of Qi Wireless Power 15 2.2.1 Power Transmitter Design 17 2.2.2 Power Receiver Design 20 Chapter3 System Design 22 3.1 Design Considerations 22 3.1.1 Supply Voltage Selection 22 3.1.2 Operating Frequency Selection 23 3.1.3 Component Selection 32 3.2 Proposed Indirectly Load Estimating Transmitter 34 3.2.1 Transient Enhancement 35 3.2.2 Mathematic Analysis in SS and SP Topology 36 3.2.3 System Block Proposed TX Architecture 41 3.2.4 System Stability 43 3.3 Proposed Reconfigurable Series/Parallel Receiver 46 3.3.1 Comparison of SS and SP Topology 47 3.3.2 System Block of Proposed RX Architecture 49 3.3.3 Conclusion of Proposed Receiver 53 Chapter4 Circuit Design 57 4.1 Transmitter Architecture 57 4.1.1 Power MOSFETs 58 4.1.2 Gate Driver 61 4.1.3 Estimator 63 4.1.4 Mode Selector, Peak Detector, and Sample & Hold 66 4.1.5 Protection Circuit 68 4.1.6 Ramp Generator 68 4.1.7 Type-III Compensator 69 4.1.8 Pre-Simulation Result 71 4.2 Receiver Architecture 73 4.2.1 Driver with a Mode Selector 74 4.2.2 Pre-Simulation Result 76 Chapter5 Layout and Measurement 77 5.1 Transmitter IC 77 5.1.1 IC Layout 77 5.1.2 Post-Simulation Result 78 5.1.3 Measurement Setup and Result 80 5.1.4 Performance Summary 87 5.2 Receiver IC 88 5.2.1 IC Layout 88 5.2.2 Post-Simulation Result 89 5.2.3 Measurement Result 90 5.2.4 Performance Summary 90 Chapter6 Conclusion and Future Work 91 6.1 Conclusion 91 6.2 Future Work 92 Reference 94

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