| 研究生: |
賴冠樺 Lai, Kuan-Hua |
|---|---|
| 論文名稱: |
操作於邊界導通模式之數位功因修正升壓型轉換器研究與設計 Study and Design of Digital Boost PFC Converter with BCM Operation |
| 指導教授: |
蔡建泓
Tsai, Chien-Hung |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2020 |
| 畢業學年度: | 108 |
| 語文別: | 中文 |
| 論文頁數: | 96 |
| 中文關鍵詞: | AC-DC轉換器 、升壓型轉換器 、功因修正 、可變導通時間控制 、數位控制 |
| 外文關鍵詞: | AC-DC converter, Boost converter, Power factor correction (PFC), Variable on-time control, Digital Control |
| 相關次數: | 點閱:68 下載:1 |
| 分享至: |
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本論文研究題目為可變導通時間控制之數位功因修正升壓型轉換器,詳細探討了操作於邊界導通模式之固定導通時間控制功因修正轉換器的研究議題,包括如何提升切換效率以及輸入電流失真的問題,並探討類比文獻實現做法,再從類比實現作法中帶入數位化研究現況,並說明數位與類比實現差異。
本作品根據研究結果設計一適用於升壓型功因修正轉換器的控制法,並且使系統操作於邊界導通模式,在預計規格下皆可達到良好的功因修正效果。所實現之新型並且易於數位實現的可變導通時間控制演算法能改善系統在邊界導通模式電流失真嚴重的問題,如此可降低輸入電流總諧波失真達到本論文研究目的,並且提升功因值。再搭配適當的零電壓及波谷切換,以提升切換效率。最後以FPGA搭配功率級板完成系統驗證與量測。相較於目前數位文獻的實現方式,本作品所提出之新型控制法簡化了複雜的波型分析又降低數位硬體實現成本,並且有明顯改善功因值的效果,最後本作品電流總諧波失真在預計規格下皆小於10%,功因值皆大於0.9,符合國際規範標準。
In this paper, the research topic is study and design of digital power factor correction (PFC) Boost Converter with boundary conduction mode (BCM) operation. The issue and analog implementation methods of BCM PFC are discussed in detail, including how to improve switching efficiency and the serious current distortion. Then, digital imple-mentation methods and the differences between the various implementation methods will be introduced
According to the conclusion after the study, this paper designs a digital boost PFC con-verter, which uses variable on-time control to minimize the effect of negative current and has BCM operation. Under zero voltage switching (ZVS) condition and valley switching (VS) condition, the efficiency of the system can be improved. In addition, the digital variable on-time control can improve the serious current distortion of the system in BCM. This method can reduce the total harmonic distortion (THD) of the input current to achieve the research purpose of this paper. Finally, the control verification and system measurement are completed by the FPGA. This paper proposed a simple method to de-rive and realize optimal on-time formula under ZVS/VS condition in BCM. Compared with digital implementation of literature, the variable on-time control proposed in this work can reduce the cost of digital hardware implementation without realizing compli-cated formula.Finally, the current THD of this work is less than 10% and power factor is greater than 0.9.
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校內:2025-03-01公開