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研究生: 陳惠姍
Chen, Huei-Shan
論文名稱: 數位控制切換式穩壓器之非線性轉換及補償技術研究
Study of Non-Linear Conversion and Compensation Schemes for Digitally-Controlled Switching Regulator
指導教授: 蔡建泓
Tsai, Chien-Hung
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2013
畢業學年度: 101
語文別: 中文
論文頁數: 111
中文關鍵詞: 非線性轉換類比數位轉換器補償技術視窗型延遲線A/D數位控制切換穩壓器
外文關鍵詞: non-linear conversion, analog-to-digital converter, compensation technique, window delay-line A/D, digitally-controlled switching regulator
相關次數: 點閱:102下載:7
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  • 本論文實作具非線性轉換及補償技術之數位控制切換式穩壓器。此穩壓器採用逐漸嶄露頭角的數位電源技術,並結合非均勻A/D轉換與補償技術,在不須額外的硬體實現下,提升了系統動態響應的性能。此外,基於結合上述兩非線性機制的穩定度分析結果,本論文亦深入探討如何開發一套自動搜尋最佳非線性參數之設計流程。最後以FPGA為實驗平台,進行量測並驗證所提出之概念的可行性,證明確實能提升暫態響應的性能,可改善在不同負載電流範圍下的暫態表現,結果與預期相符。另外,也設計具可調整解析度之視窗型延遲線A/D,轉換器除了說明操作原理並進行理論分析外,本研究亦提出一系統化之設計流程來達成系統規格的目標,最後經由TSMC 1P6M 0.18μm製程下線並整合至數位控制器進行驗證與量測。

    In this thesis, a digitally-controlled switching regulator with non-linear conversion and compensation scheme is presented. Non-linear analog-to-digital conversion and compensation techniques are proposed to improve transient response without increasing hardware cost. The development of an optimum nonlinear parameters auto-search design flow is also discussed, with consideration to stability analysis regarding the combination of two nonlinear mechanisms. The dynamic response performance at different load current is verified with FPGA experimental results. Additionally, a window delay-line A/D with programmable resolutions is also introduced. The operation principle and theoretical analysis are illustrated in detail. Moreover, a systematic design flow for meeting system specifications is also proposed. The A/D has been fabricated in TSMC 0.18μm CMOS technology and verified as along with a digital controller.

    第一章 緒論 1 1.1 研究背景與動機 1 1.2 相關研究發展 3 1.3 目標與貢獻 5 1.4 論文架構簡介 6 第二章 數位控制切換式穩壓器簡介 8 2.1 系統工作原理與操作模式 8 2.2 類比數位轉換器 14 2.2.1. 信號轉換對象 14 2.2.2. 規格與模型 18 2.3 數位補償器 20 2.4 數位脈波寬度調變器 21 第三章 非均勻類比數位轉換技術對提升系統性能之探討及驗證 27 3.1 文獻研究探討 27 3.1.1 穩態電壓調節率 28 3.1.2 暫態響應 33 3.2 實驗設計與驗證 41 3.2.1. 目標與應用 41 3.2.2. 系統規格與架構 41 3.2.3. 系統設計與模擬 43 3.2.4. FPGA系統實作與驗證 47 3.2.5. 成果比較與討論 50 第四章 非線性補償技術對提升系統性能之探討及驗證 51 4.1 文獻研究探討 51 4.1.1. 參考電壓追蹤響應 51 4.1.2. 抽載暫態響應 53 4.2 實驗設計與驗證 59 4.2.1. 目標與應用 59 4.2.2. 系統架構與規格 59 4.2.3. 系統設計與模擬 60 4.2.4. FPGA系統實作與驗證 64 4.2.5. 成果比較與討論 66 第五章 結合非線性類比數位轉換及補償技術於改善系統動態特性 67 5.1 構想及目標 67 5.2 系統架構與規格 67 5.3 系統設計與模擬 68 5.3.1. 設計流程 68 5.3.2. 模型建立 69 5.3.3. 模擬結果 69 5.4 FPGA平台實作與量測 71 5.5 成果比較與討論 74 5.5.1. 使用機制成效比較 74 5.5.2. 文獻比較表與結論 76 第六章 低功率視窗型延遲線類比數位轉換器之晶片設計與系統驗證 78 6.1 延遲線類比數位轉換器架構 78 6.2 低功率視窗型延遲線類比數位轉換器之晶片設計 82 6.2.1. 架構與規格 82 6.2.2. 操作原理及設計(理論分析) 83 6.2.3. 電路設計與模擬 84 6.2.4. 佈局考量 88 6.2.5. 晶片量測結果 88 6.2.6. 成果比較與討論 90 6.3 延遲線類比數位轉換器晶片於數位控制切換式電源之系統驗證 92 6.3.1. 實驗設計與規格 92 6.3.2. FPGA平台量測結果 92 6.3.3. 整合式晶片量測結果 95 6.3.4. 成果比較與討論 96 第七章 結論與展望 98 7.1 總結與貢獻 98 7.2 未來工作與研究方向 98 7.2.1. 非線性類比數位轉換與補償技術 98 7.2.2. A/D架構實現 99 參考文獻. 100 附錄. 104

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