| 研究生: |
吳倚彰 Wu, Yi-Jang |
|---|---|
| 論文名稱: |
應用串列式編碼架構降低晶片匯流排的串音效應 Serial Bus Coding Schemes for Cross-talk Reduction in On-Chip Bus |
| 指導教授: |
郭致宏
Kuo, Chih-Hung |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2006 |
| 畢業學年度: | 94 |
| 語文別: | 中文 |
| 論文頁數: | 83 |
| 中文關鍵詞: | 向量 、匯流排編碼 、串音效應 、耦合電容 、增速 、封包 |
| 外文關鍵詞: | packet, speed-up, coupling-capacitance, crosstalk, bus coding, vector |
| 相關次數: | 點閱:75 下載:1 |
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由於製程的進步導致串音效應愈來愈嚴重,造成晶片內部連接線延遲,並且限制了系統效能。傳統降低串音效應的編碼方法,會造成較大的匯流排面積。所以在本論文中,提出了以封包為處理單位的串列式編碼。它的編碼方法是以增加傳送向量數量的方式,來達到降低匯流排面積的目的。我們設計各種不同的串列式編碼演算法與電路,來降低串音效應。且使用HSPICE來模擬並測量匯流排上的消耗能量與訊號傳遞延遲,以及使用0.18-μm CMOS standard cell library 來估計編解碼器的面積與延遲。
The crosstalk delay becomes more and more serious due to advanced technology, and it limits the performance of system. In the past literatures some coding methodologies have been proposed to reduce crosstalk, but they will result in a serious bus area overhead. In this paper, we propose a serial coding methodology that encodes a packet at once. This coding methodology increases transmitted number of patterns to reduce bus area and we propose various coding algorithms and circuits that reduce crosstalk effect. Delay and energy dissipation on the bus are obtained using HSPICE. Delay and area of the codec are estimated using 0.18-μm CMOS standard cell library.
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