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| Author: |
洪華襄 Hung, Hua-Hsiang |
|---|---|
| Thesis Title: |
應用於終端AI推論之RISC-V處理器整合混合精度卷積加速器與記憶體映射架構 An Energy-Efficient RISC-V CPU Architecture with Integrated Mixed-Precision SIMD-Based Convolution Engine and Dynamic Memory Mapping for Edge AI |
| Advisor: |
范銘彥
Fan, Philex |
| Degree: |
碩士 Master |
| Department: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| Thesis Publication Year: | 2025 |
| Graduation Academic Year: | 113 |
| Language: | 英文 |
| Pages: | 91 |
| Reference times: | Clicks: 144 Downloads: 0 |
| Share: |
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