本論文提出一個應用於單顆鋰電池(2.7V~4.2V)的電壓模式控制降壓穩壓器電路，並建立一個系統性的流程，包括系統層次、電路層次與電晶體層次，分別使用Mathcad、SIMPLIS與HSPICE進行模擬。為了獲得較好的效率，本文採用同步整流的架構以減少導通損失。當電路操作在不連續導通模式時，由於同步整流架構中的電晶體屬於雙向導通元件，將會發生逆電流的現象並造成功率損耗，本文以零電流偵測裝置改善此現象。本文並提出一個功率電晶體尺寸最佳化的方法以減少晶片面積。此外，在附錄中提出一個適用於類比互補式金氧半導體積體電路快速設計的方法。
本電路使用TSMC 0.35um CMOS製程進行設計，所設計的降壓穩壓器規格如下：輸入電壓2.7~4.2V、輸出電壓0.9V~(Vin-0.2)V、最大效率95.2%。

A voltage-mode buck regulator for the application of a cell of Li-ion battery (2.7V~4.2V) is presented in this thesis, and a systematic procedure including system level, circuit level and transistor level is introduced. Mathcad, SIMPLIS and HSPICE are used to implement the simulation, respectively. In order to obtain high efficiency, the synchronous rectification architecture is used to reduce conduction loss. When the regulator is operated in discontinuous conduction mode, the reversed current will occur because of the bi-directional switching of the synchronous rectifier. A zero current detector circuit is used to solve this problem. A power stage optimization method to reduce the chip area is also introduced in this thesis. Finally, an analog design method for fast sizing is presented in the appendix.
The circuit is designed with TSMC 0.35um CMOS technology. The range of input voltage is from 2.7V to 4.2V. The range of output voltage is from 0.9V to (Vin–0.2)V. The maximum of efficiency is 95.2%.

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