日益進步的生產技術，使得計算機系統以越來越快的速度進化。但是，無論再新穎的設計、再強大的效能，新的計算機架構總是要面對一個難解的問題，也就是使用者對舊有軟體環境的依賴，如果擁用廣大使用群的軟體不能快速的被移植到新的架構上，那麼再先進的設計也可能因為市場無法擴展而凋零。二進制碼轉譯技術的出現使得這樣局面有了挽回的機會，配合適當的二進制碼轉譯機制，新的硬體設計可以執行原本為其他硬體編譯的二進制碼，因此使用者便能在不同的平台上使用相同的軟體。
二進制碼轉譯視實現時的軟硬體需求，有很多種設計方法。本論文提出一個使用軟體設計的模型，使得傳統的CISC二進制碼能在不更動的前提下，被載入到RISC平台的記憶體中並完成執行動作。本文的設計引進了轉譯快取的概念，同時提出了一種以Basic Block為單位的轉譯執行機制。對於程式跳躍行為發生時可能產生的目的位址不明確的問題，我們引用一種類似軟體中斷的機制來解決。本論文所提出的方案經過在ARM平台上的實作證實了是可行且有效的，我們並針對程式的特殊遞迴行為對系統效能的影響提出了實驗數據和分析的結果。

Advancing progress in microelectronic has speeded up the evolution of computer systems. However, new architectures inevitably confront a difficult situation: users are always reluctant to give up existing software and platform. If popular applications cannot be migrated to the newly designed architectures fast enough, these powerful new designs may end in poor market share and extinction. Binary translation technology provides a new solution for such a dilemma. With appropriate binary translation mechanism, newly developed architectures can adopt software compatibility to other existing platforms. Users will be able to continue installing and using their favorite applications on these newly-designed machines.
Depending on different requirements, binary translation can be implemented with hardware and software support or purely software-based. In this thesis, a software-based design is proposed. A dynamic binary translation system is implemented to execute CISC binaries on a RISC platform without the modification of binary code. Our design introduced the concept of translation cache, and proposed a basic-block based execution model. For branch behaviors that may cause disorder of program flow, we use a mechanism similar to software interrupt of OS to solve the problem. The proposed design is implemented on an ARM platform and verified to be functional and effective. An analysis of recursive program behavior on this binary translation system is also addressed.

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