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研究生: 王聖銘
Wang, Sheng-Ming
論文名稱: 具高功因之可調導通時間交流-直流升壓型轉換器
High Power Factor AC-DC Boost Converter with Adaptive On-time Control
指導教授: 蔡建泓
Tsai, Chien-Hung
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2014
畢業學年度: 102
語文別: 中文
論文頁數: 113
中文關鍵詞: 交-直流轉換器切換式升壓轉換器功因修正控制器固定導通時間控制前饋可調導通時間電路總諧波失真改善
外文關鍵詞: AC/DC Converter, Switching Boost Converter, Power Factor Correction(PFC), Constant On-time Control, Feedforward Adaptive On-time(FAO), Total Harmonic Distortion(THD) Improvement
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  • 本論文分為兩部分,第一部分主要介紹現今功因修正技術。從功因修正器的研究背景與動機,介紹到功因修正的原理及各式架構。接著對於現今功因修正控制技術分類為兩大種,操作於連續導通模式以及操作於邊界導通模式的控制法。並特別針對目前控制方式最簡單且較熱門的固定導通時間控制法做進一步的介紹,逐項分析此控制法的缺陷及目前文獻所提出的解決方案。
    第二部分即是針對固定導通時間控制法提出改善架構。對於固定導通時間控制法總協波失真表現較差的缺陷提出「前饋可調導通時間電路」改善方案,透過此電路的前饋機制可以使功因修正器在不同輸入電壓環境下都能透過偵測前饋資訊來調整導通時間,達到總諧波失真最佳化的效果。而對於緩啟動、重新啟動電路及最小導通時間議題也同時提出了整合電路,將面積大幅縮小同時滿足各種功能需求。本系統是採用TSMC 0.35μm 混和訊號製程透過國家晶片中心進行晶片實作。結果顯示,系統在加入前饋可調導通時間電路後總諧波失真值在不同輸入電壓環境下都有明顯改善,在輸入電流波形量測上也可看出差異,功因值也皆達到0.95以上,而最高轉換效率可以達到95%。

    This thesis is composed of two parts. The first part introduces modern power factor correction technology. It introduces the power factor correction from the background and motivation to the operation principles and various power stage architectures. The control technology is classified into two types: the continuous conduction mode; and the boundary conduction mode. Finally, it analysis the shortcomings of constant on-time control, which is the simplest and the most popular technique, and discusses the solution from the recent papers.
    In second part of this thesis, a feedforward loop adaptive on-time (FAO) improved circuit for wide input range, low total harmonic distortion(THD) is presented. It can change the on-time with a feedforward loop in different condition to get a better THD. It also combines the soft-start, restart timer, and minimum off time issues in one circuit, which can significantly reduce the area while meeting the needs of variety of functions.
    This PFC controller was implemented with the 0.35 μm Mixed-signal CMOS process. The results show that the THD has been improved after adding FAO circuit under different input voltage. The improvements can be discovered by input current waveform. For the specification of 10-80W load range, the peak efficiency of 95% is achieved, and the power factor maintained at 0.95.

    摘要 III Abstract V 誌謝 VII 表目錄 X 圖目錄 XI 第一章 緒論 1 1.1 研究背景與動機 1 1.2 相關研究與發展 2 1.3 目標與貢獻 3 1.4 論文架構簡介 4 第二章 功率因數修正原理設計與分析 5 2.1 功率因數定義及標準[4] 5 2.2 被動式功率因數修正電路 8 2.3 主動式功率因數修正電路 10 2.3.1 功率級架構分類 11 2.3.2 操作模式分類 17 2.3.3 前端濾波電路及AC整流電路 19 第三章 主動式功率因數修正控制介紹 22 3.1 操作於連續導通模式控制法 22 3.1.1 峰值電流控制法[23] 22 3.1.2 平均電流控制法[23] 26 3.1.3 磁滯電流控制法[23] 28 3.1.4 廣輸入電壓技術改良 31 3.1.5 非線性載波控制法(NLC) 32 3.1.6 單週期控制法(OCC) 37 3.2 邊界導通模式控制技術 43 3.2.1 峰值電流控制法 44 3.2.2 固定導通時間控制法 47 3.3 比較與討論 51 第四章 固定導通時間功率因數修正技術 53 4.1 問題與方案 53 4.1.1 THD不佳 53 4.1.2 輕載切換頻率過高 54 4.1.3 ZCD電路負壓輸入問題 56 4.1.4 啟動電路效率不佳 56 4.1.5 開關切換突波問題 56 4.1.6 低輸入電壓誤動作問題 56 4.1.7 廣輸入電壓問題 57 4.1.8 啟動電流過大問題 57 4.2 研究現況與文獻設計實例 58 4.3 比較與討論 75 第五章 固定導通時間功因修正器設計與實作 76 5.1 目標與應用 76 5.2 系統架構與提出技術 77 5.2.1 前饋可調導通時間電路 79 5.2.2 重新啟動及緩啟動電路 80 5.3 電路設計 81 5.3.1 前饋可調導通時間電路 81 5.3.2 重新啟動及緩啟動電路 83 5.3.3 最小turn off時間電路 84 5.3.4 非負壓零電流偵測電路 85 5.3.5 運算放大器 86 5.3.6 比較器 87 5.3.7 S-R閂鎖器 88 5.4 模擬結果 89 5.5 晶片佈局與量測規劃 91 5.5.1 元件選用及考量 91 5.5.2 佈局考量與實施要點 94 5.5.3 晶片測試與規劃 94 5.6 量測結果 98 5.6.1 穩態 99 5.6.2 PF&THD 102 5.6.3 效率 104 5.6.4 暫態 105 5.7 成果比較與討論 105 第六章 結論 107 6.1 總結與貢獻 107 6.2 未來工作與研究方向 107 參考文獻 110

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