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研究生：	蔣為宇 Chiang, Wei-Yu
論文名稱：	快速分數像素運動預測演算法設計與實現 Design and Implement of a Fast Fractional Motion Prediction Algorithm for Advanced Video Coding
指導教授：	郭致宏 Kuo, Chih-Hung
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2011
畢業學年度：	99
語文別：	中文
論文頁數：	138
中文關鍵詞：	分數像素運動搜尋、快速運動估測、進階視訊編碼
外文關鍵詞：	Fractional Motion Search, Fast Motion Estimation, Advanced Video Coding
相關次數：	點閱：113 下載：1
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本論文提出一個適用於進階視訊編碼的快速無除法分數像素運動預測演算法及硬體架構。為了替代分數像素內插以及兩階段式的搜尋，我們的演算法利用分數像素誤差曲面以及運動向量預測來預測分數運動向量。當誤差曲面的中心整數點誤差量很小時，我們選擇一個運動向量預測導向的機制來使運動向量差值的消耗最小。對於其他的情況，我們開發一個無除法的直接預測技術來估測分數像素誤差曲面的最小值並將最小值的位置定為分數運動向量。我們的演算法可以比參考軟體減少平均87%的運算複雜度並且只有平均0.06dB的PSNR下降以及平均0.6%的位元率增加。我們演算法的硬體架構實現與現有技術相比則可以節省50%的面積以及降低50%的執行時間。

This paper presents a fast divider-free algorithm and its VLSI architecture for fractional motion prediction of advanced video coding. Instead of fraction-pixel interpolation and secondary search, the proposed algorithm predicts the fractional motion vector based on the fractional-pixel error surface and motion vector prediction (MVP). For the error surface with lower center integer-pixel error, we use a MVP-oriented scheme to minimize the cost of the motion vector difference (MVD). For the other case, we develope a divider-free direct prediction to estimate the minimum of the fractional-pixel error surface and regard the position as the fractional motion vector. The proposed algorithm can reduce about 87% of computation complexity compared to the reference software with only 0.06 dB PSNR drop and 0.6% of bit rate increase in average. The VLSI architecture of the proposed algorithm can save 50% of the area and 50% of time compared to the prior arts.

中文摘要 ......................................................................... I
Abstract .......................................................................... II
誌謝 ................................................................................ III
目錄 ................................................................................ IV
圖目錄 ............................................................................ VII
表目錄 ............................................................................ X
第一章 緒論 ................................................................... 1
1-1 運動估測與運動補償簡介 ........................................ 2
1-1-1 整數像素運動估測 ................................................ 5
1-1-2 分數像素運動估測 ................................................ 6
1-2 研究動機 .................................................................. 6
1-3 研究貢獻 ................................................................. 10
1-4 論文架構 ................................................................. 10
第二章 研究背景 ........................................................... 12
2-1 H.264/AVC中的預測模式 ........................................ 12
2-1-1 畫框內預測 .......................................................... 13
2-1-2 畫框間預測 .......................................................... 15
2-2 分數像素誤差曲面 .................................................. 19
2-3 傳統的分數像素運動估測演算法 ............................. 24
2-3-1 全域搜尋演算法 ................................................... 24
2-3-2 全域搜尋演算法的硬體實現 ................................. 25
2-4 其他的分數像素運動估測演算法 ............................. 27
2-4-1 中間軸分數像素搜尋法 ........................................ 27
2-4-2 一次疊代分數像素運動估測演算法 ...................... 29
2-4-3 局部搜尋分數像素運動估測演算法 ...................... 30
2-4-4 多項式分數像素運動估測演算法 .......................... 33
2-4-5 矩陣型的分數像素運動估測演算法 ...................... 35
2-5 不同分數像素運動估測演算法分析與比較 .............. 38
第三章 演算法的設計與實現 ......................................... 41
3-1 直接預測演算法 ...................................................... 41
3-1-1 最佳運動向量精準度選擇機制 ............................. 43
3-1-2 非建全誤差曲面的預測程序 ................................. 45
3-1-3 建全誤差曲面的預測程序 ..................................... 47
3-1-4 直接預測演算法的分析 ........................................ 50
3-2 無除法之快速分數像素運動預測演算法 .................. 51
3-2-1 運動向量預測導向預測程序 ................................. 53
3-2-2 使用比較機制的非建全誤差曲面預測程序 ............ 55
3-2-3 快速建全誤差曲面預測程序 ................................. 58
3-3 演算法之硬體實現 ................................................... 60
3-3-1 硬體架構介紹 ....................................................... 60
3-3-2 誤差曲線最低點檢測器與誤差值產生器 ............... 65
3-3-3 有效誤差量位元寬度選擇 ..................................... 66
3-3-4 輸入與輸出訊號 ................................................... 71
第四章 軟硬體實驗結果 ................................................. 73
4-1 軟體實驗結果 .......................................................... 74
4-2 硬體實現結果 .......................................................... 76
4-3 FPGA驗證與軟硬體共同模擬 .................................. 78
第五章 結論與未來展望 ................................................. 80
5-1 結論 ........................................................................ 80
5-2 未來展望 ................................................................. 81
參考文獻 ....................................................................... 82
附錄A ............................................................................ 86
附錄B ........................................................................... 131
附錄C ........................................................................... 134
附錄D ........................................................................... 137
                                    

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校內：2013-09-02公開
校外：2013-09-02公開

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