| 研究生: |
張嘉展 Chang, Chia-Chan |
|---|---|
| 論文名稱: |
適合電力線家庭網路的介質存取控制層之設計與研發 A Media Access Control Layer with Triple-DES for Power-Line Home-Networking |
| 指導教授: |
陳中和
Chen, Chung-Ho |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2002 |
| 畢業學年度: | 90 |
| 語文別: | 中文 |
| 論文頁數: | 133 |
| 中文關鍵詞: | 電力線家庭網路 |
| 外文關鍵詞: | powerline homenetworking |
| 相關次數: | 點閱:47 下載:1 |
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對近年來蓬勃發展的家庭網路而言,如何選擇傳輸媒介是項重要的課題。由於乙太網路必須大量佈線,而無線網路又易受建築結構影響,故以電力線作為網路傳輸媒介的相關研究逐漸受到重視。電力縣家庭網路的好處是不用重新配置線路,且訊號傳輸不受建築結構影響。然而由於家庭中所有電力插座都連接同一條電力線,等於將所有裝置都接在同一條傳輸媒介上。這種現象會造成隱私性與安全性的問題,任何人都有機會經由任意一個電力插座竊取資訊,或干擾電力線家庭網路的運作。這個問題可藉由將裝置予以編號,用類似乙太網路IP的方式進行管理。然而隨著裝置數量的增多,這種管理方式便顯得缺乏效率且過於麻煩。
因此,我們設計了一個整合Triple-DES密碼系統的介質存取控制層,並稱之為TDMAC,來處理電力線家庭網路的隱私權問題。在我們所設計的系統中,整個電力線家庭網路會被規劃為多個邏輯網路(Logical Network),每個裝置至少必須加入一個邏輯網路,而一個邏輯網路中的所有裝置將會共用一個加密金鑰。在這種機制下,即使取得封包,若不知道金鑰,亦無法取得真正的訊框內容。同理,若有人欲送出封包來干擾電力線家庭網路的運作,也會因為接收裝置無法解密,而將該封包丟棄。藉由這種方法,我們能夠有效降低電力線家庭網路在隱私性上的影響。
我們以Verilog程式語言進行IP Core的設計,並進行波形模擬。波形模擬結束後,我們同時以FPGA驗證流程以及Cell-Based驗證流程進行TDMAC的運作測試,以確定我們所設計出的TDMAC的功能可否正常運作。
The development of power-line based home-network is growing up in these years. The advantage of using power-line as communication medium is that it is ready-made. Nevertheless, since the power-line is not design for data transmission, there are some problems for power-line based home-network. For example, since all buildings in a community share a common power line, there will be some privacy and security issues between two adjacent homes. The control frame from my home may affect the operation of my neighbors’ home network, and meanwhile, everyone can try to shut down my security system from any outlet nearby. For a small LAN, we can just assign every devices a particular number and manage it, but it is just a temporary solution to the problem.
Therefore, we propose a media access control layer that integrates a triple-DES cryptographic system called the TDMAC. In our point of view, a whole home-network system can be subdivides into some logical networks. Each power-line based home-network device must at least participate in a logical network, and all devices in a logical network will share a set of triple-DES key. When a device sends a frame, only devices that have keys can understand the content of this frame, while other devices will discard it as garbage packet. In this mechanism, the affect of privacy and security issues is tremendously reduces.
We design the IP core of TDMAC by verilog programming and carryout the wave simulation result. Then we verify the function of the TDMAC by both the FPGA verification flow and the Cell-Based verification flow, and make sure that this IP core is correctly operate.
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www.silicore.net, www.opencores.org