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研究生: 穆志偉
Mu, Chih-Wei
論文名稱: 應用全數位鎖相迴路技術之數位控制直流-直流轉換器
ALL-Digital PLL-Based Digitally Controlled DC-DC Converter
指導教授: 蔡建泓
Tsai, Chien-Hung
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2010
畢業學年度: 98
語文別: 中文
論文頁數: 115
中文關鍵詞: 數位脈波寬度調變器全數位鎖相迴路TIQ-based flash A/D直流-直流轉換器Top-down設計流程
外文關鍵詞: Digital Pulse Width Modulator, All-Digital Phase-Locked Loop, TIQ-based flash A/D, DC-DC converter, Top-down Design Flow
相關次數: 點閱:132下載:8
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  • 本論文提出應用全數位鎖相迴路技術之數位控制直流-直流轉換器,主要特點包含可校準數位脈波寬度調變器與低功耗視窗型TIQ-based flash A/D電路。使轉換器達到自動調變且校準切換頻率、全數位電路合成、省面積、低功耗……等好處。藉由GUI設計輔助軟體,本文提出開發數位控制轉換器的Top-down IC設計流程,減少設計時間與複雜度。最後本文用FPGA平台驗證電路功能,並以TSMC 0.18µm 1P6M 3.3V CMOS製程實現完整數位控制直流-直流轉換器電路架構。

    This paper proposes an all-digital PLL-based digitally controlled dc-dc converter, the main features is to contain the adjustable digital pulse width modulation and low-power windows-based and TIQ-based flash A/D circuit. The advantage of converter is that can accurately calibrate its operating frequency and have all-digital circuit synthesis, low area, low power consumption. By the GUI design assistance software, this paper proposes a top-down IC design flow for digitally controlled DC-DC converter, reduce design time and complexity. Finally this paper verify the circuit function with the FPGA platform and use TSMC 0.18µm 1P6M 3.3V CMOS process to achieve a complete digitally controlled DC-DC converter circuit architecture.

    第一章 緒論 1 1.1 研究背景與動機 1 1.2 相關研究發展 3 1.3 論文架構簡介 6 第二章 數位直流-直流轉換器原理及設計流程 7 2.1功率級操作及分析 7 2.1.1 直流穩態分析 7 2.1.2 交流穩態分析 14 2.2 控制器模式及工作原理 16 2.2.1 類比數位轉換器(A/D) 19 2.2.2 數位補償器(Digital Compensator) 20 2.2.3 數位脈波寬度調變器(DPWM) 22 2.3 可適性Dead-Time控制 25 2.4 數位直流-直流轉換器系統設計環境簡介 26 2.4.1 FPGA設計流程 26 2.4.2 IC設計流程 28 第三章 全數位鎖相迴路之可校準數位脈波寬度調變器 31 3.1 傳統DPWM架構簡介 31 3.1.1 Counter-based DPWM 31 3.1.2 Delay-line DPWM 32 3.1.3 Segmented DPWM 34 3.1.4 Hybrid DPWM 36 3.2 可校準DPWM簡介 37 3.2.1數位鎖相迴路 37 3.2.2 Dual Clock DPWM 41 3.2.3 Digital DLL based DPWM 43 3.3全數位鎖相迴路之可校準DPWM原理及設計 44 第四章 ADPWM降壓型數位直流-直流轉換器FPGA系統實作 61 4.1 系統架構及規格 61 4.2 ADPWM功能及線性度驗證 64 4.3 閉迴路系統量測 66 4.3.1 Steady State 67 4.3.2 Load Regulation 68 第五章 低功率視窗型TIQ-based Flash A/D轉換器 70 5.1應用於數位電源控管的A/D架構介紹 70 5.1.1 Ring-oscillator A/D 71 5.1.2 Delay-line A/D 73 5.1.3 Flash A/D 77 5.2 低功率視窗型TIQ-based flash A/D原理及設計 79 5.2.1 TIQ比較器 80 5.2.2差動對偏壓電路 84 第六章 ADPWM降壓型數位直流-直流轉換器晶片系統設計 90 6.1 系統規格及架構 90 6.2 數位電路pre-simulation及post-simulation結果 92 6.3 閉迴路系統模擬結果 94 6.3.1 Steady State 94 6.3.2 Load Regulation 97 6.3.3 Line Regulation 99 6.3.4 效率 101 6.4 IC佈局與量測規劃 103 第七章 結論 106 7.1結論與貢獻 106 7.2未來研究方向 106 參考文獻 108 附錄: VLSI Design/CAD Symposium 2009 會議論文 112

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