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研究生：	王家輝 Wang, Jia-Hui
論文名稱：	應用於TFT-LCD源極驅動電路之低功耗小面積輸出緩衝器設計 Low Power and Area Efficient Output Buffers for TFT-LCD Source Driver
指導教授：	蔡建泓 Tsai, Chien-Hung
學位類別：	博士 Doctor
系所名稱：	電機資訊學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2011
畢業學年度：	99
語文別：	英文
論文頁數：	122
中文關鍵詞：	源極驅動晶片、動態偏壓、雙路徑機制、尾電流、電流正迴授、線性穩壓器
外文關鍵詞：	Source driver, dynamic-bias, dual-path mechanism, tail current, current-positive-feedback, low dropout regulators
相關次數：	點閱：200 下載：4
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輸出緩衝器為源極驅動晶片中重要的區塊電路，它決定了速度、解析度、電壓範圍和功率消耗等規格，而單一個源極驅動晶片，必須整合數百個以上的輸出緩衝器，故每一個輸出緩衝器的面積和功率都應該越小越好。然而輸出緩衝器的規格需求在大尺寸和小尺寸的TFT-LCD面板上，是不同的，因此本論文提出了3個新技術的輸出緩衝器：第一個技術是動態偏壓和雙路徑機制，此技術能大幅地增加輸出緩衝器的驅動能力。第二個技術是面板尺寸感測，此技術能感測面板尺寸大小，並將其資訊轉換成3位元的數位訊號去調節輸出緩衝器的驅動能力，第三個技術是尾電流提升，即使靜態電流在很小的情況下，此技術也能大幅增加輸出緩衝器的驅動能力。每一個提出的輸出緩衝器，不但有電路上的分析，同時都有經過晶片實作與量測。
源極驅動晶片部份，共實作了6-bit 和10-bit源極驅動晶片，6-bit源極驅動晶片使用了交越自我偏壓的輸出緩衝器，可以有效地降低整體源極驅動晶片的功率消耗。並且整合至640-channel的源極驅動晶片裡，實際應用於17吋的面板上，進行量測驗證。10-bit源極驅動晶片使用了電流正迴授的輸出緩衝器，可以大幅地改正傳統Class-A輸出緩衝器的缺點，而且只增加了3個電晶體與1條靜態電流路徑。並搭配10位元的數位類比轉換器晶片，進行量測驗證。此外，因輸出緩衝器為類比電路，故本論文在電源供應晶片上，也提出2顆線性穩壓器，來供應輸出緩衝器乾淨穩定的電源。

The output buffers are important building blocks of a source driver which determines the speed, resolution, voltage swing and power dissipation. As the large amount of output buffer amplifiers built on a chip, each buffer should occupy a small die area, and its static power consumption should be minimized. The performance requirement of output buffer is different in large and small TFT-LCD panel sizes; therefore, this dissertation proposed three output buffers with three technologies to meet the each requirement. The first one manipulates dynamic-bias and dual-path mechanism which increase the driving capability of output buffer; the second one is a panel sensing buffer which adjusts the driving capability by 3-bit binary digital codes according to the panel loading. The third one is a tail current boosting buffer which increases the driving capability even though the quiescent current is ultra low. Finally, the proposed buffers are compared with state-of-the-art output buffers to demonstrate their efficiency.
This dissertation realizes 6-bit and 10-bit source driver. The former one uses the cross-self-bias buffer to effectively reduce power consumption overheads of conventional source driver, and this source driver is then used in an SXGA 17-inch LCD panel to perform the experimental characterization. The latter one uses the current-positive-feedback technique to overcome the drawbacks of conventional class-A buffer; it only adds three transistors and one quiescent current path, and this buffer is verified by using a 10-bit R-C digital-to-analog converter. In addition, this dissertation proposes two low dropout regulators to provide a clean and stable power for output buffer.

Abstract 	I
Acknowledgements 	V
Table of Contents 	VI
List of Tables 	VIII
List of Figures 	IX
Chapter 1 Introduction 	1
1 Motivation 	1
2 Thesis Organization 	3
Chapter 2 Basic Concepts and System Overview 	4
1 Liquid Crystal 	4
2 LCD Polarity Inversion 	6
3 Gamma Correction 	8
4 Charge Recycling 	9
5 LCD Driver System 	11
5.1 Gate Driver	12
5.1 Source Driver	13
Chapter 3 Analog Blocks in Source Driver 	15
1 Architecture of Basic DAC 	15
2 Architecture of Output Buffer 	17
2.1 Class-A Output Stage	17
2.2 Class-B Output Stage	19
2.3 Class-AB Output Stage	21
Chapter 4 Output Buffers Implementation and Measurement Results 	24
1 Dynamic-Bias and Push-Pull Dual-Path Output Buffer 	25
1.1 Small-Signal Analysis	27
1.2 Working Principe of the Proposed Output Buffer	29
1.3 Dynamic-Bias Technology of Class-AB Output Stage	31
1.4 Experimental Results	33
1.5 Summary	37
2 Self-Adjusting-Driver-Capability Output Buffer 	38
2.1 Proposed Rail-to-Rail Output Buffer Architecture	40
2.2 Binary Transistor Array	42
2.3 Panel Sensing Circuit	43
2.4 Experimental Results	45
2.5 Summary	47
3 Tail-Current-Boosting Output Buffer 	49
3.1 Output Buffer Circuit	49
3.2 Operating Principle	51
3.3 Small Signal Analysis	52
3.4 Experimental Results	54
3.5 Summary	55
Chapter 5 Source Drivers Implementation and Measurement Results 	56
1 640-Channel 6-bit Source Driver 	58
1.1 Push-Pull Driving Scheme	58
1.2 Low-Power Push-Pull Buffer with Cross-Self-Bias	59
1.3 Small Signal Analysis	62
1.3 Operation of Buffer	63
1.4 Experimental Results	65
1.5 Summary	68
2 2-Channel 10-bit Source Driver	70
2.1 Output Buffer with Current Positive Feedback	70
2.2 Offset Averaging	78
2.3 10-bit Resistor-Capacitor DAC	79
2.4 Experimental Results	80
2.5 Summary	84
Chapter 6 Fast-Transient LDO Design and Measurement Results	85
1 A Capacitor-Less Low-Dropout Regulator with Slew-Rate Enhanced Circuit	87
1.1 Small-signal analysis	89
1.2 Quasi-small-signal analysis	92
1.3 Large-signal analysis and Working principle of the proposed LDO with SRE	95
1.4 Experimental Results	97
1.5 Summary	102
2 A Fast-Transient Low-dropout Regulator with Mismatch Comparator Control	103
2.1 Small-signal analysis	103
2.2 Analysis of Mismatch Comparator Control	105
2.3 Analysis of Output Stage	108
2.4 Experimental Results	110
2.5 Summary	113
Chapter 7 Conclusion and Future Work 	115
1 Conclusion 	115
2 Future Work 	116
Reference 	117
Biography 	120
Publication List	121

                                    

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