本論文中實現一個六位元每秒一億次取樣快閃式類比數位轉換器，並使用一個背景式偏移誤差校正電路來消除前置放大器和比較閂鎖器因製程所產生的偏移誤差電壓。利用開關使電阻串造成參考電壓1LSB的位階位移。輸入訊號因為偏移誤差在不同的位階位移下命中相同溫度計編碼的機率會不相同。根據輸出溫度計編碼以及利用數位類比電路轉換器和漣波記數器校正比較器的偏移誤差，同時可校正電阻所造成的不匹配。而為了達到更高解析度，進而使用兩階位階位移技術。

此快閃式類比數位轉換器之實現是採用TSMC 0.13微米，1P8M互補型金氧半混合信號製程，模擬結果顯示，在1GHz的取樣頻率下，輸入訊號為440MHz時，此類比數位轉換器有37dB的SNDR動態表現。在1.2 V電壓下，整個晶片不包含輸出緩衝器共消耗了13.2mW的功率。

In this thesis, a 6-bit 1GSPS Flash ADC is implemented, and a background offset calibration circuit is proposed to calibrate the offset of the preamplifier and the latch due to mismatch. By using the switches for resistor ladder, the 1LSB step-shifted voltage from its reference voltage is generated. The probability of the input signal hitting into the same thermometer code would be not be the same in differential step-shifted. According to the output thermometer code and use the DAC with the ripple counter circuit to calibrate the offset. The two-level step-shifted method is proposed for higher resolution.

A 6-bit 1G Sample/s flash ADC is implemented by TSMC 0.13um 1P8M CMOS process. Simulation results show that SNDR is 37dB with 441MHz input frequency at 1GHz sample rate. The power consumption is 13.2mW with a 1.2-V supply where output buffers are excluded.

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