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研究生: 閔高鵬
Min, Kao-Peng
論文名稱: 矽摻雜氮化鋁電阻式記憶體特性分析及、互補式陣列結構應用於PUF之研究
Investigation of Silicon-doped AlN based Resistive Random Access Memory and Complementary Resistive Switching Array Structure for PUF Applications
指導教授: 朱聖緣
Chu, Sheng-Yuan
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2021
畢業學年度: 109
語文別: 中文
論文頁數: 84
中文關鍵詞: 電阻式記憶體氮化鋁摻雜互補式結構物理不可複製功能
外文關鍵詞: RRAM, AlN, doping, Complementary Resistive Switching(CRS), Physically Unclonable Function(PUF)
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  • 現代科技日新月異,物聯網(IoT)及大數據運算時代也隨之來臨,對於記憶體的效能需求將急速增加,伴隨半導體摩爾定律的延續,傳統上使用之SRAM、DRAM、Flash Memory等記憶體在發展上也逐漸達到物理極限,因此促使了各種新興非揮發性記憶體的蓬勃發展,其中電阻式記憶體(RRAM)除了高密度儲存功能或是人工智慧的應用外,因其本身所具備的獨特導電機制,使得不論是在操作週期與週期間或元件與元件間之阻態變化都存在隨機性的差異,其具備物理不可複製函數(Physical Unclonable function, PUF)特性。PUF是運用於半導體在製程中的變異使元件本身具備獨特的指紋,由於攻擊者難以透過逆向工程將其破壞,為保障硬體安全的方法之一。影響 RRAM PUF的關鍵指標是可靠度問題,改善PUF運作核心之RRAM Crossbar陣列,例如更高的熱穩定性、更多操作次數,更長的保留時間等並提升製程的良率,將會大幅改善RRAM PUF之可靠度。氮化鋁具有良好的絕緣性且與CMOS製程相容適合作為RRAM電阻層材料使用,本研究第一部分使用共濺鍍的方式將矽(Si)摻雜進氮化鋁(AlN)薄膜中製作出(TiN/AlN:Si/Pt) RRAM,並藉由調控濺鍍功率優化Si摻雜的量,使元件耐久度可提升至150萬次(約原本的1.5倍),此外on/off ratio也會些微增加。
    由於RRAM不論是應用於何種場域,Sneak current一直是其高密度發展面臨的問題,然而傳統上RRAM 搭配電晶體(1T1R)結構雖然可以有效降低此問題但也擴大了單元面積因而喪失了RRAM高密度的優勢,因此本論文第二部份研究則是將已開發之RRAM反向堆疊形成TiN/AlN:Si/Pt/AlN:Si/TiN Complementary resistive switches (CRS)結構,CRS結構具有非線性 I-V特性曲線可有效降低Sneak current的影響,此結構由於是兩個MIM結構反向堆疊,相較於1T1R結構更節省了單位面積,然而RRAM元件需要較大的成形電壓,容易造成後端電路晶片損壞,為了改善此問題,本實驗藉由插入Ag薄層,利用金屬電化學方式輔助電阻絲的傳導降低初始成形電壓及操作電壓,最後將製作完成之8×8 RRAM Crossbar陣列藉由比較不同位元的高阻態高低產生不可預測的密鑰,並利用內部及外部漢明距離公式計算出產生之密鑰的獨特性及可靠度。

    Reliability has always been an evaluation indicator of RRAM in applications. In this research, we used co-sputter to fabricate Si-doped AlN based RRAM device. We adjusted the power of co-sputter to control the silicon concentration in the AlN thin film, and verified by XPS analysis. The results showed that due to the optimization of the amount of silicon doping, the endurance of the device has been successfully increased by about 1.5 times and on/off ratio increased to 500 compared with the original device. In the second part, we used the optimized experiment parameter to fabricate TiN/AlN:Si/ Pt/AlN:Si/TiN RRAM 8×8 crossbar CRS structure. CRS structure has a nonlinear I-V curve which can effectively reduce the sneak current. In order to reduce the operating voltage and the formation voltage, a thin layer of ag is inserted between TiN and AlN. Because of the addition of the ag thin layer, the forming voltage of RRAM decreased , and the current nonlinearity is also increased, so that the array size can ideally be expanded to 426x426. In addition, the high resistance state difference between each RRAM cell of the array is also enlarged, and it can be used in the generation of RRAM PUf keys. After being compared by the read circuit comparator, we have generated a RRAM PUF key with reliability 99.1%, uniformity 49.5%, and randomness 48.9%.

    摘要 I 致謝 IX 圖目錄 XII 表目錄 XV 第一章 緒論 1 1-1 研究背景 1 1-2 研究動機 1 第二章 理論與文獻回顧 6 2-1 記憶體簡介 6 2-1-1 相變記憶體(PCRAM) 6 2-1-2 鐵電式記憶體(FeRAM) 7 2-1-3 磁阻式記憶體(MRAM) 8 2-1-4 電阻式記憶體(RRAM) 8 2-2 電阻式記憶體操作模式 10 2-2-1 Forming process 10 2-2-2 Set and Reset process 11 2-2-3 交錯式陣列(Crossbar array)結構及其操作模式 11 2-3 絕緣層載子傳導機制 17 2-3-1 歐姆傳導(Ohmic Conduction) 17 2-3-2 穿隧(Tunneling) 17 2-3-3 蕭特基發射(Schottky Emission) 17 2-3-4 普爾-法蘭克發射(Poole-Frenkel Emission) 18 2-3-5 空間電荷限制電流(Space Charge Limited Current, SCLC) 18 2-3-6 跳躍傳導(Hopping Conduction) 19 2-4 PUF(physical unclonable function)簡介 20 2-4-1 PUF相關參數 20 2-4-2 常見PUF種類 21 第三章 實驗方法與步驟 23 3-1 實驗流程 23 3-2 RRAM MIM元件製作 24 3-2-1 氮化矽陶瓷靶製備 24 3-2-2 基板製作 25 3-2-3 RRAM元件圖形曝光 25 3-2-4 氮化矽摻雜氮化鋁電阻層薄膜沉積 25 3-2-5 上電極沉積 26 3-3 RRAM CRS交錯式陣列製作 26 3-3-1 陣列bit line圖形製作 26 3-3-2 陣列word line圖形製作 26 3-4 電性測量 27 3-5 薄膜分析 28 3-5-1 高解析掃描式電子顯微鏡(HR-SEM) 28 3-5-2 原子力顯微鏡(Atomic Force Microscope, AFM) 29 3-5-3 X光光電子能譜儀(X-ray Photoelectron Spectroscopy, XPS) 29 第四章 結果與討論 30 4-1 矽摻雜氮化鋁薄膜材料特性 30 4-1-1 矽摻雜之氮化鋁薄膜表面形貌 30 4-1-2 矽摻雜之氮化鋁薄膜化學組成 32 4-2 矽摻雜氮化鋁電阻式記憶體元件分析 39 4-2-1 RRAM基本特性 39 4-2-2 RRAM可靠度測量 45 4-2-3 RRAM電流傳導機制探討 50 4-3 矽摻雜氮化鋁電阻式記憶體互補式陣列與PUF應用 59 4-3-1 矽摻雜氮化鋁電阻式記憶體互補式結構電性分析 59 4-3-2 矽摻雜氮化鋁電阻式記憶體互補式結構陣列讀取邊際 62 4-3-3 矽摻雜氮化鋁電阻式記憶體互補式結構電流傳導機制 64 4-3-4 矽摻雜氮化鋁電阻式記憶體PUF之應用 71 第五章 結論與未來展望 76 5-1 結論 76 5-2 未來展望 78 參考文獻 79

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