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研究生: 丁振國
Ding, Zhen-Guo
論文名稱: 開迴路導管式類比數位轉換器的研究
A Research on Open-Loop Pipelined Analog-to-Digital Converters
指導教授: 張順志
Chang, Soon-Jyh
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2006
畢業學年度: 94
語文別: 英文
論文頁數: 89
中文關鍵詞: 數位校正導管式開迴路式類比-數位轉換器
外文關鍵詞: analog-to-digital converter, pipeline, open-loop, digital calibration
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  • 在高速及高解析度的導管式類比數位轉換器中,常常需要採用一個具有高頻寬且高增益的運算放大器以迴授的形式來達到預期的速度及精確度。然而,因為製程的演進而造成操作電壓不斷的下降,設計這樣高規格的運算放大器將面臨很大的挑戰。另一種實現的方式則是以開迴路的運算放大器來實現導管式類比數位轉換器中類比訊號放大的功能。由於開迴路運算放大器架構較為簡單,因此除了在操作速度上可以得到很好的效能之外,同時也相當適合在低電壓下操作。不過,若採用開迴路的方式將會面臨到非線性放大的問題,使得整個導管式類比數位轉換器的精確度難以提昇。

    因此在本篇論文中,我們針對非線性放大的問題,提出兩種解決的方式。一種是以根為基礎逼近式數位校正技術,利用簡化非線性的問題以及使用以根為基礎的數位校正技術以達到降低數位演算法的複雜度。除此之外,我們亦提出以線性逼近的方式以降低記憶體的需求。另外一種則是以類比的技巧提升開迴路式放大器的線性度,如此後級數位校正僅需要解決放大器增益偏差的部份,因此可大量簡化數位校正演算法的設計複雜度,使得開迴路導管式類比數位轉換器朝向更低功率的設計。論文中,我們以MATLAB建立行為模式來進行電路效能的預測以及驗證所提出之方法的可行性。

    In high speed and high resolution pipelined ADCs, a wide bandwidth and high voltage gain operational amplifier in feedback configuration is necessary to achieve the desired speed and accuracy. However, with the advance of deep submicron technology, the supply voltage scales down continuously. The design of such high performance operational amplifier will face big challenges. An alternative approach is to implement the gain stage in pipelined ADC by using open-loop amplifier. Because of its simple architecture, it is easy to achieve the requirement of high speed operation and suitably operates at the low supply voltage. Nevertheless, the non-linear gain problem of an open-loop amplifier will significantly limit the accuracy of the pipelined ADC. Hence, solving the non-linear gain problem is a big issue by using this open-loop amplifier approach.

    Therefore, in this thesis, two methods are proposed to solve the non-linearity problem. The first method is the radix-based approximated calibration method. Through simplifying the non-linear problem and using the radix-based calibration technique, the proposed method can reduce the implementation complexity of calibration algorithm. Besides, we also propose a linear approximation scheme to reduce the required memory size in the digital calibration method. The other one is to enhance the linearity of open-loop amplifier by using some analog linearization techniques. By employing this approach, the back-end calibration part only needs to deal with the gain error of the open-loop amplifier. Therefore, it can simplify the design complexity, and hence save the power consumption, of the back-end digital calibration method. In the thesis, we construct the behavioral models to predict the circuit performance and to demonstrate their efficiency of the proposed methods by using MATLAB simulator.

    CHAPTER 1 INTRODUCTION.....1 1.1 Motivation............. .1 1.2 Thesis Organization.... .4 CHAPTER 2 PIPELINED ADC... ..........5 2.1 Overview of Pipelined ADC........5 2.2 Building Blocks Design...........12 2.2.1 Front-end sample and hold amplifier (SHA)....... 13 2.2.2 Multiplying digital-to-analog converter (MDAC).. 15 2.2.3 Sub analog-to-digital converter (Sub-ADC)....... 17 2.2.4 Clock generator................................. 18 2.3 Design Considerations.. .......................... 20 2.3.1 How to determine the stage resolution........... 20 2.3.2 How to decide the specifications of opamp....... 22 2.3.3 How to decide the size of sampling capacitors... 25 2.4 Design Example.................................... 29 2.5 Summary........................................... 32 CHAPTER 3 OPEN-LOOP PIPELINED ADC.................... 33 3.1 Introduction...................................... 33 3.2 Circuit Architecture.............................. 36 3.2.1 ADC architecture................................ 36 3.2.2 Open-loop pipelined stage....................... 37 3.3 Error Model for Open-Loop First Stage............. 38 3.4 Digital Domain Error Compensation................. 41 3.5 Digital Background Calibration Technique.......... 44 3.5.1 Calibration concept............................. 44 3.5.2 Statistics-based estimation method.............. 46 3.6 Summary........................................... 48 CHAPTER 4 APPROXIMATED CALIBRATION METHOD FOR OPEN-LOOP PIPELINED ADC... 50 4.1 Introduction.................... 50 4.2 Linear Approximation Technique.. 51 4.2.1 Calibration concept........... 51 4.2.2 Digital calibration block..... 53 4.2.3 Short summary................. 54 4.3 Radix-Based Approximated Calibration Method........55 4.3.1 Calibration concept............................. 55 4.3.2 Radix-based calibration method.................. 60 4.3.3 Proposed linear approximation scheme............ 61 4.4 Simulation Results................................ 63 4.5 Summary........................................... 65 CHAPTER 5 ANALOG CALIBRATION TECHNIQUE FOR OPEN-LOOP PIPELINED ADC...... 67 5.1 Introduction............................. 67 5.2 Adaptively Biased MOS Transconductor..... 68 5.3 Proposed Constant Gain Amplifier (CGA)... 70 5.4 Pipelined ADC Using Proposed CGA ........ 73 5.4.1 ADC architecture....................... 73 5.5 Complete Model and Simulation Results.... 77 5.5.1 Complete behavioral model.............. 77 5.5.2 Simulation results..................... 79 5.6 Summary.................................. 82 CHAPTER 6 CONCLUSIONS AND FUTURE WORK....... 83 6.1 Conclusions... 83 6.2 Future Work... 84 REFERENCE.........86 BIOGRAPHY.........89

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