音源定位是藉由麥克風對接收到聲音訊號，確認聲源空間座標的過程，其原理是估測音源傳遞到麥克風之時間差，經過角度轉換，藉以判斷音源方位。為了能使音源定位系統達到低成本、低運算複雜度、高辨識率與少硬體面積的目的，本論文著重在時域訊號處理，基於AMDF估算訊號之時間差以建立「音源定位系統」，並於實作於IC。
本論文提出折疊結構和循環緩衝區兩種硬體架構，減少控制訊號與節省硬體面積，其中有聲段偵測電路、AMDF電路、系統控制單元皆已最佳化設計完成，本系統採用I2S協定提供不同種類ADC使用之彈性，外部動態的threshold設定可使系統適用於各種背景環境，系統輸出兩麥克風時間差之資訊，可依使用環境調整麥克風距離，便於後端接續應用。
實驗結果證明，與其他文獻比較，本論文所提出的創新架構在面積、功率消耗有明顯的改善。音源定位系統的準確率可以達到 90％ 角度誤差介於± 3°。此系統透過台積電0.18-μm CMOS製成實作於晶片上，晶片的功率消耗約1.3 mW,晶片面積為0.998 mm2。

For auditory source localization (ASL) system, this paper presents an integrated circuit (IC) for auditory source localization and bearing estimation. Auditory localization (or direction of arrival (DOA) estimation) aims to identify the coordinates of an unknown auditory source by using a microphone array. The auditory signal processing inherently requires high calculation power and large dataset size. Therefore, there still remain several difficulties for chip design such as computational complexity, economic cost, and reusability. In this study, we choose simplicity and practicality over accuracy.
To handle the ever increasing design complexity of hardware, we present a new chip design, which is primarily based on the average magnitude difference function (AMDF), for reducing the hardware area and power consumption. Meanwhile, to reduce unnecessary resource computation, two novel hardware architectures, the folded architecture for short critical paths, and the circular buffer for simply data access control are also proposed. Through the folded architecture, the chip area and the critical path can be reduced simultaneously, which makes the system operating clock to be speedup by 16 times.
The circular buffer mechanism is designed to achieve low complexity and high performance according to characteristics of analog digital converter (ADC) data accessing. In addition, complexity of memory control unit can be also simplified with this circular buffer. For the system to be used in different sound environments, an adjustable threshold setting mechanism is design. The 5-bit threshold value can be set to detect the voiced signal, when input signals are higher than the short term threshold.
The experimental results show that our proposed design can successfully enhance the operating frequency and reach higher performance than previous work [17], [18], [19], [20]. The ASL system has significantly improved in the area of innovative architecture, performance and power consumption. Furthermore, the accuracy rate of our system can achieve 90% with ±3° errors on average. The whole ASL system is designed with TSMC 0.18-μm CMOS process. The finally chip utilizes approximately 1.3 mW of power and 0.998 mm2 of silicon area.

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