物聯網是目前被廣泛討論的新興技術，隨著近年來晶片生產技術不斷進步以及網路的普及，所涵蓋的範圍也逐漸擴大，安全性議題也越來越受到重視。在物聯網系統中，各種裝置間的資料傳輸都有可能被駭客竊取，加密保護成了不可或缺的手段。而相較於傳統的加密系統，物理不可複製函數利用製造過程中產生的隨機變異，實現出類似指紋的概念，每顆物理不可複製函數晶片都是獨一無二的，除了具有高安全性和防偽造性，輕量化的特點也很適合應用於物聯網。本論文以180奈米設計，搭配台灣半導體中心提供的電阻式記憶體，提出具有防禦機制的高可靠度電阻式記憶體型物理不可複製函數。在安全性方面，使用了雙層架構來防止機器學習攻擊，以及假的電阻式記憶體來混淆探測性攻擊。本論文利用電阻式記憶體的非揮發特性，在模擬時可以達到100%的可靠度和49.48%的獨特性，在相關文獻的比較裡都有能突出的表現。

The internet of things (IoT) is a growing technology widely discussed today. With the continuous advancement of chip production technology and the popularization of the Internet in recent years, the scope of IoT has gradually expanded. And security issues have also been raised. In the IoT system, encryption protection has become an indispensable means for data transmission among various devices to avoid data stolen by hackers. When compared with the traditional encryption system, the physical unclonable function (PUF) uses the random variation generated in the manufacturing process to form the unique identity like human’s fingerprints. Each PUF chip is unique, highly secure, and anti-counterfeiting. The characteristics of PUF chips, such as lightweight and inexpensive, are very suitable for the IoT devices. In this thesis, a highly reliable RRAM-based PUF with enhanced security is presented. In the security part, a two-layer architecture is used to prevent machine learning attacks, and fake RRAMs are provided to confuse probing attackers. The proposed design achieves 100% reliability and 49.48% uniqueness in simulation, showing competitive performance over related works.

[1] K. Yang, D. Blaauw, and D. Sylvester, “Hardware Designs for Security in Ultra-Low-Power IoT Systems: An Overview and Survey,” IEEE Micro, vol. 37, no. 6, pp. 72–89, 2017.
[2] C. H. Chang, Y. Zheng, and L. Zhang, “A Retrospective and a Look Forward: Fifteen Years of Physical Unclonable Function Advancement,” IEEE Circuits Syst. Mag., vol. 17, no. 3, pp. 32–62, 2017.
[3] A. Maiti, V. Gunreddy, and P. Schaumont, “A systematic method to evaluate and compare the performance of physical unclonable functions,” Embed. Syst. Des. with FPGAs, vol. 9781461413, pp. 245–267, 2013.
[4] A. Chen, “Utilizing the variability of resistive random access memory to implement reconfigurable physical unclonable functions,” IEEE Electron Device Lett., vol. 36, no. 2, pp. 138–140, 2015.
[5] P. Y. Chen, R. Fang, R. Liu, C. Chakrabarti, Y. Cao, and S. Yu, “Exploiting resistive cross-point array for compact design of physical unclonable function,” in Proc. 2015 IEEE Int. Symp. Hardware-Oriented Secur. Trust. HOST 2015, pp. 26–31, 2015.
[6] C. Nail et al., “Understanding RRAM endurance, retention and window margin trade-off using experimental results and simulations,” Tech. Dig. - Int. Electron Devices Meet. IEDM, pp. 4.5.1-4.5.4, 2017.
[7] M. D. Lee, “Development and Challenges of the New Non-Volatile Memory,” NDL Nano Communication, vol. 21, no. 3, pp. 9–14, 2014, [Online]. Available: http://www.ndl.org.tw/docs/publication/21_3/pdf/D2.pdf. [Accessed Aug. 17 2020].
[8] R. Liu, H. Wu, Y. Pang, H. Qian, and S. Yu, “A highly reliable and tamper-resistant RRAM PUF: Design and experimental validation,” in Proc. 2016 IEEE Int. Symp. Hardw. Oriented Secur. Trust, 2016, pp. 13–18.
[9] Y. Pang et al., “Design and optimization of strong Physical Unclonable Function (PUF) based on RRAM array,” in Proc. 2017 Int. Sym. on VLSI-TSA, 2017, pp.1-2
[10] Y. Pang, H. Wu, B. Gao, D. Wu, A. Chen, and H. Qian, “A novel PUF against machine learning attack: Implementation on a 16 Mb RRAM chip,” Tech. Dig. - Int. Electron Devices Meet. IEDM, pp. 12.2.1-12.2.4, 2018.
[11] J. Yang et al., “A physically unclonable function with BER < 0.35% for secure chip authentication using write speed variation of RRAM,” in Proc. Eur. Solid-State Device Res. Conf., vol. 2018-Septe, pp. 54–57, 2018.