本論文在設計資料驅動電路之源極隨耦器，隨著製程差異，元件本身特性會產生變異，如薄膜電晶體臨界電壓變異會造成輸出電壓的誤差，因此本論文提出三個不同架構之源極隨耦器作為資料輸出緩衝器，藉由TFT匹配與自我補償的方式，來補償源極隨耦器因驅動電晶體的臨界電壓變異所導致的輸出資料電壓不正確，並分別利用a-Si以及a-IGZO TFT的模型來模擬及驗證電路的可行性。
本論文所提出的第一個電路由五顆TFT及兩組訊號線所組成並利用TFT匹配來補償驅動電晶體的臨界電壓對輸出電壓所造成的誤差，然而其缺點為在重置階段時功率消耗較大。由模擬結果可以發現，其a-Si及a-IGZO TFT的電路輸出電壓誤差在-0.03 V至0.20 V之內，而量測數據顯示，電路一輸出電壓於24小時高溫操作約衰減3.76 V。第二個電路由四顆TFT及兩組訊號線所組成，同樣利用TFT匹配來補償驅動電晶體之臨界電壓，利用驅動電晶體及訊號線的調變來對資料線的輸出電壓做充放電的行為，模擬結果顯示，其輸出電壓誤差在-0.17 V至0.18 V之內。第三個電路為四顆TFT、一個電容及三組訊號線所組成，在操作上可自我補償驅動電晶體的臨界電壓對輸出電壓所造成的誤差，根據模擬結果，其輸出電壓誤差在-0.21 V至0.21V之內。因此本論文所提出的三個電路，皆能改善源極隨耦器驅動電晶體的臨界電壓對輸出電壓的影響，減少元件數及訊號複雜度，並可適用且整合於資料驅動電路使輸出資料電壓更為穩定。

This work presents three analog output buffers by using source follower circuit and that are modified with a-Si and a-IGZO TFT models. Because of the TFT threshold voltage variation, due to the errors of fabrication processes or long time operation, may cause the errors of the output voltage and non-uniformity of the display. This work developed three source follower circuits to compensate for the threshold voltage variation of driving TFT and maintain the stability of output voltages.
The first source follower circuit with five TFTs and two signal lines compensates for threshold voltage variation of driving TFT by using the method of TFT match. However, it has large power consumption at the reset stage. The simulation results showed that the offset voltage errors are in the range of -0.03 V and 0.20 V. According to the measurement results, the degradation of the output voltage is about 3.76 V at 60℃ under 24 hours operation. The second source follower circuit is composed of four TFTs and two signal lines. It can improve the structure of the first circuit and thus reduces the power consumption of the circuit. The simulation results indicate that the offset voltage errors are in the range of -0.17 V and 0.18 V. The third source follower composed of four TFTs, one capacitor, and three signal lines, compensates the threshold voltage variation of driving TFT. The simulation results showed that the offset voltage errors are in the range of -0.21 V and 0.21 V.
The proposed structures can reduce the components in the circuit, and are able to maintain stable output voltage. This work will contribute to the applications of the integrated source driver circuit on flexible substrate in the future.

[1]. R. W. Zehner, K. R. Amundson, and H. G. Gates, “System integration of electronic paper displays,” in SID Tech. Dig., vol. 37, pp. 1827-1829, 2006.
[2]. R. Sakurai, S. Ohno, S. I. Kita,Y. Masuda, and R. Hattori, “Color and flexible electronic paper display using QR-LPD® technology,” in SID Tech. Dig., vol. 37, pp. 1922-1925, 2006.
[3]. H. Kawai, M. Miyasaka, A. Miyazaki, T. Kodaira, S. Inoue, T. Shimoda, K. Amundson, R. J. Paolini Jr., M. McCreary, and T. Whitesides, “A flexible 2-in. QVGA LTPS-TFT electrophoretic display,” in Proc. SID Tech. Dig., vol. 36. pp. 1638-1641, 2005.
[4]. C. H. Kim, S. J. Yoo, H. J. Kim, K. P. Hong, S. J. An, J. M. Jun, and J. Y. Lee, “High-resolution integrated a-Si row driver circuits,” in SID Tech. Dig., vol. 36, pp. 939-941, 2005.
[5]. J. H. Oh, J. H. Hur, Y. D. Son, K. M. Kim, S. H. Kim, E. H. Kim, J. W. Choi, S. M. Hong, J. O. Kim, B. S. Bae, and J. Jang, “2.0 inch a-Si:H TFT-LCD with low noise integrated gate driver,” in SID Tech. Dig., vol. 36, pp. 942-945, 2005.
[6]. T. H. Hwang, S. I. Hong, W. K. Hong, W. H. Cui, I. S. Yang, and O. K. Kwon, “A scan driver circuit using transparent thin film transistors,” in SID Tech. Dig., vol. 40, pp. 1136-1139, 2009.
[7]. Ruquiya and I. A. Huq, “Phase clocked shift register with cross connecting between stages,” U.S. Patent 5, 434, 488, 1995.
[8]. H. Lebrun, T. Kretz, J. Magarino, and N. Szydlo, “Design of integrated drivers with amorphous silicon TFTs for small displays basic concepts,” in SID Tech. Dig., vol. 36, pp. 950-953, 2005.
[9]. H. Lebrun, N. Szydlo, and E. Bidal, “Threshold voltage drift of amorphous silicon TFT in integrated drivers for active matrix LCDs,” in EuroDisplay, pp. 83-85, 2002.
[10]. Y. H. Jang, S. Y. Yoon, B. Kim, M. D. Chun, H. N. Cho, N. W. Cho, C. D. Kim, and I. J. Chung, “Integrated gate driver circuit using a-Si TFT with dual pull down structure,” in IDW Dig., pp. 333-336, 2004.
[11]. S. Y. Yoon, Y. H. Jang, B. Kim, M. D. Chun, H. N. Cho, N. W. Cho, C. Y. Sohn, S. H. Jo, C. D. Kim, and I. J. Chung, “Highly stable integrated gate driver circuit using a-Si TFT with dual pull-down structure,” in SID Tech. Dig., vol. 36, pp. 348-351, 2005.
[12]. S. Edo, M. Wakagi, and S. Komura, “QVGA a-Si TFT LCD with high reliability integrated gate driver,” in SID Tech. Dig., vol. 37, pp. 1551-1554, 2006.
[13]. H. H. Hsieh, C. H. Wu, and C. C. Wupp, “Amorphous In2O3-Ga2O3-ZnO thin tilm transistors and integrated circuits on flexible and colorless polyimide substrates,” in SID Tech. Dig., vol. 39, pp. 1207-1210, 2008.
[14]. K. Nomura, A. Takagi, T. Kamiya, H. Ohta, M. Hirano, and H. Hosono, “Amorphous oxide semiconductors for high-performance flexible thin-film transistors,” Japanese Journal of Applied Physics., vol. 45, no. 5B, pp. 4303-4308, May 2006.
[15]. C. W. Chang , S. F. Chen , S. C. Wu , G. L. Lin, and T. F. Lei, “Spacer technique to fabricate pSi TFTs with 50nm nanowire channels,” in SID Tech. Dig., vol. 39, pp. 1185-1187, 2008.
[16]. H. H. Hsieh, T. Kamiya, K. Nomura, and H. Hosono, and C. C. Wu, “Modeling of amorphous oxide semiconductor thin film transistors and subgap density of states,” in SID Tech. Dig., vol. 39, pp. 1277-1280, 2008.
[17]. S. M. Venugopal and D. R. Allee, “Integrated a-Si:H source drivers for 4”QVGA electrophoretic display on flexible stainless steel substrate,” Journal of the Society for Information Display, vol. 3, no. 1, pp. 57-63, March 2007.
[18]. S. M. Venugopal, R. Shringarpure, D. R. Allee, and S. M. O'Rourke, “Integrated a-Si:H source drivers for electrophoretic displays on flexible plastic substrates,” in Flexible Electronics and Displays Conference and Exhibition, pp. 1-5, 2008.
[19]. S. E. Burns, W. Reeves, B. H. Pui, K. Jacobs, S. Siddique, K. Reynolds, M. Banach, D. Barclay, K. Chalmers, N. Cousins, P. Cain, L. Dassas, M. Etchells, C. Hayton, S. Markham, A. Menon, P. Too, C. Ramsdale, J. Herod, K. Saynor, J. Watts, T. von Werne, J. Mills, C. J. Curling, and H. Sirringhaus, “A flexible plastic SVGA e-paper display,” in SID Tech. Dig., vol. 37, pp. 74-76, 2006.
[20]. Y. Fujisaki, H. Sato, Y. Inoue, H. Fujikake, and T. Kurita, “Fast-response flexible LCD panel driven by a low-voltage organic TFT,” in SID Tech. Dig., vol. 37, pp. 119-122, 2006.
[21]. S. M. Jahinuzzaman, A. Sultana, K. Sakariya, P. Servati, and A. Nathan, “Threshold voltage instability of amorphous silicon thin-film transistors under constant current stress,” App. Phys. Lett., vol. 87, 2005.
[22]. S. E. Liu and C. P. Kung, “Modified threshold voltage shift model in a-Si:H TFTs under prolonged gate pulse stress,” IEEE Electron Device Lett., vol. 29, no. 7, pp. 734-736, July 2008.
[23]. B. S. Bae, J. W. Choi, J. H. Oh, and J. Jang, “Level shifter embedded in drive circuits with amorphous silicon TFTs,” IEEE Transactions on Electron Devices, vol. 53, no. 3, pp. 494-498, 2006.
[24]. S. H. Jung, J. H. Park, C. W. Han, and M. K. Han, “New source follower type analog buffers using poly-Si TFTs for active matrix displays,” in SID Tech. Dig., vol. 35, pp. 1452-1455, March 2004.
[25]. Y. H. Tai, C. C. Pai, B. T. Chen, and H. C. Cheng, “A source-follower type analog buffer using poly-Si TFTs with large design windows,” IEEE Electron Device Lett., vol. 26, no. 11, pp. 811-813, November 2005.
[26]. S. Z. Huang and Y. H. Tai, “A new evaluation method of the threshold voltage for a low temperature poly-silicon thin film transistor in a source follower configuration,” in IDMC, pp. 442-444, 2005.
[27]. B. T. Chen, Y. H. Tai, Y. J. Wei, K. F. Wei, C. C. Tsai, C. Y. Huang, Y. J. Kuo, and H. C. Cheng, “Investigation of source-follower type analog buffer using low temperature poly-Si TFTs,” Solid-State Electronics, pp. 354-359, February 2007.
[28]. 戴亞翔，TFT-LCD面板的驅動與設計，五南書局，2006.
[29]. D. A. Johns and K. Martin, Analog integrated circuit design, John Wiley & Sons, Inc., 1997.
[30]. C. Y. Lin, G. T. Ho, M. J. Yu, S. E. Liu, C. C. Cheng, C. M. Lai, and Y. H. Yeh, “Low temperature top-gate amorphous IGZO thin film transistors and inverter fabricated on polyimide and glass substrates,” in IDMC, pp. 1-2, 2009.
[31]. H. Y. Lu, P. T. Liu, T. C. Chang, and S. Chi, “Enhancement of brightness uniformity by a new voltage-modulated pixel design for AMOLED displays,” IEEE Electron Device Lett., vol. 27, no. 9, pp. 743-745, September 2006.
[32]. Y. H. Tai, B.T. Chen, Y. J. Kuo, C. C. Tsai, K. Y. Chiang, Y. J. Wei, and H. C. Cheng, “A new pixel circuit for driving organic light-emitting diode with low temperature polycrystalline silicon thin-film transistors,” J. Display Technol., vol. 1, no. 1, pp. 100–104, September. 2006.
[33]. I. Hwang, S. Moh, M. C. Lee, and E. S. Lee, “Design of integrated a-Si gate driver circuits for low power consumption,” in Proc. SID Tech. Dig., pp. 842-845, 2008.
[34]. H. R. Han, J. F. Tsai, W. T. Liao, and W. C. Wang, “Reliable integrated a-Si select line driver for 2.2-in QVGA TFT-LCD,” in Proc. SID Tech. Dig., pp. 946-949, 2005.
[35]. S. Y. Yoon, Y. H. Jang, B. Kim, M. D. Chun, H. N. Cho, N. W. Cho, C. Y. Sohn, S. H. Jo, C. D. Kim, and I. J. Chung, “Highly stable integrated gate driver circuit using a-Si TFT with dual pull-down structure,” in Proc. SID Tech. Dig. , pp. 348-351, 2005.
[36]. A. Nathan, G. R. Chaji, and D. J. Ashtiani. “Driving schemes for a-Si and LTPS AMOLED displays,” J. Display Technol., vol. 1, no. 2, pp. 267-277, December 2005.
[37]. S. H. Jung, W. J. Nam, and M. K. Han, “A new voltage-modulated AMOLED pixel design compensating for threshold voltage variation in poly-Si TFTs,” IEEE Electron Device Lett., vol. 25, no. 10, pp. 690-692, October 2004.