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研究生：	蔡尚霖 Tsai, Shang-Lin
論文名稱：	具虛擬振盪器控制之電網形成換流器研製 Implementation of a Grid-Forming Inverter with Virtual Oscillator Control
指導教授：	陳建富 Chen, Jiann-Fuh
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2024
畢業學年度：	112
語文別：	英文
論文頁數：	104
中文關鍵詞：	電網形成 (GFM) 、虛擬震盪器控制 (VOC) 、中性點箝位換流器
外文關鍵詞：	Grid-Forming (GFM), Virtual oscillator control (VOC), Neutral point clamped inverter
相關次數：	點閱：52 下載：0
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本文使用的虛擬振盪器控制(VOC)方法是一種基於電網形成技術，虛擬振盪器控制與傳統的下垂控制或虛擬同步機(VSM)控制不同，虛擬振盪器控制是模擬非線性振盪器的動態性能並且操作在時域中。本文以三相三階中性點箝位換流器作為電網形成換流器的架構，此架構相較於傳統二階換流器具有較低諧波失真與較小的開關電壓應力等優點，並且在換流器的控制器中加入虛擬阻抗迴路、電流內迴路以及電壓外迴路。以軟體MATLAB Simulink模擬額定功率6.6 kVA、輸入電壓800 V、交流輸出相電壓220 Vrms/60 Hz、切換頻率為50 kHz 及電網相電壓220 Vrms/60 Hz之電網形成換流器控制。模擬結果顯示虛擬振盪器控制擁有下垂特性並且相較於下垂控制暫態響應速度提升60.1%。實作結果換流器併網時，安定時間為106ms並且有效抑制振盪幅度，THDi 為 3.6%，並證實了本文控制方法的可行性。

In this thesis, a Virtual Oscillator Control (VOC) method based on grid-forming applications is implemented. VOC is different from conventional droop control or virtual synchronous machine (VSM) control because VOC simulates the dynamic performance of a nonlinear oscillator and operates in the time domain. In this thesis, the three-phase three-level neutral-point clamped (NPC) inverter is used as the grid-forming inverter architecture. Compared with the conventional two-level inverter, this architecture has the advantages of lower harmonic distortion and smaller switching voltage stress. Additionally, the inverter’s controller includes virtual impedance loop, inner current loop, and outer voltage loop. Use software MATLAB Simulink to simulate the inverter control of the power grid with rated power 6.6 kVA, input voltage 800 V, output AC phase voltage of 220 Vrms/60 Hz, switching frequency 50 kHz and grid phase voltage of 220 Vrms/60 Hz. The simulation results show that after applying proposed control method, the inverter has Droop control characteristics and the transient response speed is faster than the Droop control. Experimental results show that the implementation of the proposed control method took 106 ms to settle within 5% of the steady-state value, effectively suppressed the oscillation amplitude, had total harmonic distortion of output current at 3.6%, and confirmed the feasibility of the proposed control method.

摘要 i
Abstract ii
誌謝 iii
Contents 1
List of Figures 4
List of Tables 8
Chapter 1 Specific Objective 9
1 Research Background and Purpose 9
2 Structure 13
Chapter 2 Literature Reviews 14
1 Multilevel Inverter 14
1.1 Cascaded H-Bridge Multilevel Inverter 17
1.2 Flying Capacitor Multilevel Inverter 19
1.3 Neutral-Point Clamped Multilevel Inverter 21
2 Sinusoidal Pulse Width Modulation (SPWM) 25
2.1 Operating Principle of NPC Inverter 28
2.2 Operating Principle when eX>0 and iLinvX>0 31
2.3 Operating Principle when eX>0 and iLinvX<0 37
3 Common Inverter Filter Topologies 42
4 Introduction of abc, αβ0 and dq Coordinates 44
4.1 abc Coordinate 44
4.2 αβ0 Coordinate (Clarke Transformation) 45
4.3 dq0 Coordinate (Park Transformation) 46
4.4 Comparison of Different Coordinate 47
5 Phase-Locked Loop (PLL) 49
6 Droop Control 49
Chapter 3 Methodology 52
1 Virtual Oscillator Control 53
2 Dual Loop and Virtual Impedance Control Under dq0 Coordinate 60
2.1 Current Loop Decouple 61
2.2 Voltage Loop Decouple 63
2.3 Virtual Impedance 65
Chapter 4 Specifications and Parameters Design 67
1 Filter Design 69
1.1 Inverter Side Inductor Design 70
1.2 Filter Capacitor Design 72
1.3 Grid Side Inductor Design 72
2 Controller Design 73
2.1 Current Loop Design 74
2.2 Voltage Loop Design 75
3 Virtual Oscillator Controller Parameter Design 76
Chapter 5 Simulation and Experimental Results 80
1 Simulation Results 80
1.1 Simulation of Closed Loop Control 80
1.2 Simulation of Grid Connecting 82
2 Experimental Results 89
2.1 Operation in off-grid state 91
2.2 Operation in grid-connected state 93
Chapter 6 Conclusions and Future Works 95
1 Conclusions 95
2 Future Works 95
References 97
                                    

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校內：2029-07-31公開
校外：2029-07-31公開電子論文尚未授權公開，紙本請查館藏目錄

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