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研究生: 朱彥嘉
Chu, Yen-Chia
論文名稱: 於低功率應用之可編程邏輯閘陣列開發可程式化直流對直流電壓調節器
Implementation of the Programmable DC-DC Voltage Regulator by FPGA for Low Power Applications
指導教授: 張簡樂仁
Chang-Chien, Le-Ren
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2008
畢業學年度: 96
語文別: 中文
論文頁數: 89
中文關鍵詞: 參考電壓直流對直流降壓式動態電壓調節器可編程邏輯閘陣列板數位補償器
外文關鍵詞: dynamic voltage scaled DC-DC step-down voltage r, voltage references, digital compensator, Field Programmable Gate Array
相關次數: 點閱:84下載:3
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  • 本論文為積體電路架構下,提出一可程式化數位控制直流對直流降壓式動態電壓調節器。本提出的電壓調節器不需要由band-gap產生不同的參考電壓,來滿足不同電路對不同電壓等級的需求。因此可以簡單的以數位碼控制調節器的輸出電壓,而不用擔心CMOS堆疊限制以及製程飄移的影響。本電壓調節器控制單元由浮點數數位補償器在可編程邏輯閘陣列板上(Field Programmable Gate Array, FPGA)驗證,並於驗證之後向國家實驗研究院晶片系統設計中心(CIC)提出了下線計畫。FPGA的驗證結果展示,在5伏特到8伏特的輸入電壓範圍之下,都可使電壓調節器穩定的輸出1.8伏特、2.7伏特及3.3伏特3種等級的電壓,並且供應的負載電流可達到2.5安培以上。

    This thesis proposes a programmable dynamic voltage scaled DC-DC step-down voltage regulator for integrated circuits (ICs). The proposed voltage regulator does not need the band-gap voltage references to generate various desired voltages for circuit loads. Therefore, the output voltage of the converter could be assigned by any voltage level for ICs without considering the effects of the CMOS stack limit and IC processing drift. The control unit of the proposed converter is realized by a floating-point digital compensator on a Field Programmable Gate Array (FPGA). After that, we apply the chip fabrication to CIC (National Chip Implementation Center). Lab experiments show that the proposed converter can supply stable voltage levels at 1.8V, 2.7V and 3.3V with variant input voltage ranging from 5V-8V. The load current could be supplied up to 2.5A.

    摘 要 I Abstract II 誌 謝 III 目 錄 IV 表目錄 XI 符號表 XII 第一章 緒論 1 1.1 研究背景 1 1.2 研究動機 2 1.3 研究貢獻 5 1.4 本文架構 6 第二章 直流電壓調節器之介紹 7 2.1 直流對直流電壓調節器 7 2.1.1 線性(耗散型)電壓調節器 7 2.1.2 切換式電壓調節器 8 2.2 切換式電壓調節器的分類 10 2.2.1 升壓式(Boost)電壓調節器 11 2.2.2 降壓式(Buck)電壓調節器 12 2.2.3 升/降壓式(Buck/Boost)電壓調節器 13 2.3 降壓式電壓調節器的特性與原理 14 2.3.1 連續電流導通模式 14 2.3.2 不連續電流導通模式 16 2.3.3 連續電流導通與不連續電流導通之邊界 17 2.3.4 輸出電壓濾波 18 2.4 切換型電壓調節器特性 19 第三章 直流電壓調節器電壓控制法 21 3.1 傳統類比控制迴路 21 3.2 以拉氏轉移函數建立連續模型 23 3.3 數位控制迴路之架構 25 3.4 以z轉移函數建立離散模型 27 3.4.1 z轉換 27 3.4.2 離散模型模擬 29 3.5 連續模型與離散模型的時域響應比較 30 3.6 離散模型的輸入電壓與負載變動模擬 31 第四章 利用FPGA驗證與實作 33 4.1 傳統電壓調節器數位控制電路 33 4.2 利用數位碼結合DAC產生參考電壓 34 4.3 本論文提出之數位參考電壓架構 35 4.4 補償器的程式撰寫 36 4.5 FPGA發展平台 37 4.5.1 FPGA使用簡介 38 4.5.2 利用QuartusII編譯電路 39 4.5.3 利用QuartusII模擬電路動作 41 4.5.4 FPGA腳位編輯與電路燒錄 42 4.5.5 FPGA板實作電路 44 4.6 實作量測結果 45 第五章 晶片架構與下線流程 53 5.1 晶片架構簡介 53 5.1.1 類比數位轉換器 55 5.1.2 浮點數補償器與數位參考碼 57 5.1.3 數位脈波寬度調變器 59 5.1.4 Dead-time controller 60 5.1.5 功率電晶體(Power-MOS) 61 5.1.6 整合後晶片內容架構 62 5.2 設計流程 63 5.3 下線前模擬結果 65 5.3.1 數位電路pre-Simulation與post-Simulation 65 5.3.2 Dead-time controller模擬 70 5.3.3 功率電晶體(Power-MOS)模擬 71 5.3.4 Co-Simulation類比與數位電路整合後模擬 72 5.4 佈局驗證結果 75 5.4.1 DRC驗證結果 75 5.4.2 LVS驗證結果 75 5.5 規格列表 76 5.5.1 直流對直流電壓調節器規格表 76 5.5.2 ADC 規格表 76 5.6 佈局平面圖 77 5.7 打線圖 78 5.8 晶片測試考量 79 第六章 結論與未來研究方向 81 6.1 結論 81 6.2 未來研究方向 82 參考文獻 83 作者簡介 89

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