| 研究生: |
黃富胤 Huang, Fu-Yin |
|---|---|
| 論文名稱: |
肌電訊號辨識系統之數位晶片實作 VLSI Implementation for EMG Pattern Recognition System |
| 指導教授: |
林志隆
Lin, Chih-Lung |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2006 |
| 畢業學年度: | 94 |
| 語文別: | 中文 |
| 論文頁數: | 77 |
| 中文關鍵詞: | ASIC 、肌電圖 、VLSI 、圖形辨識 |
| 外文關鍵詞: | Pattern Recognition, VLSI, ASIC, Eelectromyogram (EMG) |
| 相關次數: | 點閱:125 下載:12 |
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臨床上有許多行動不便甚至於肢體障礙的患者,常需要一些電子醫療儀器設備的輔助,在設計這些醫療儀器時,最重要的技術在於如何有效辨識命令並做出正確的控制,以輔助患者的行動。因此本研究主要的目的,在於發展出能即時辨識肌電圖訊號之晶片。藉由分析肌電圖訊號能即時判斷出肢體障礙者所做之動作,以做為癱瘓患者與輔助設備間之人機溝通介面。
本論文以VLSI設計方式實現了肌電圖辨識系統晶片。由於肌電圖訊號辨識所需的辨識速度遠低於本晶片的工作頻率上限,因此採用時域多工和折疊架構的方式。以減少運算單元,達到縮小面積、降低成本且能即時辨識的需求。首先在對肢體障礙者收集肌電圖訊號後,經由我們在晶片上所設計的訓練模式,加以分析並建立肢體障礙者的肌電圖資料庫,以作為辨識的依據。再利用動態時間校正演算法對特徵參數進行分析並辨識出使用者之特徵值(cepstral)以判斷動作狀態。本晶片的操作頻率為2MHz,core size 約為0.84 X 0.84 mm2,chip size為1.789 X 1.789 mm2,符合了本研究縮小面積的目標。未來希望能朝SOC之領域與醫學訊號處理應用繼續發展,為生醫領域及殘障輔具盡一番心力。
The disabled persons such as arm amputees or spinal cord injured patients usually need to use auxiliary apparatus like electric prosthesis or functional electrical stimulation system. It is an important topic to control these devices. The goal of this research is to develop an application specific integrated circuit (ASIC) prototype with real-time pattern recognition for the EMG signal. The system of real-time pattern EMG recognition can be used as the control device to the assisting equipments of the patients.
This research presents dedicated ASIC design for an EMG pattern recognition system. The recognition speed by requisition is much slower than the maximum operation frequency of our chip, therefore time-multiplexing and folded architecture are adopted. To avoid rapid growth of logic units due to circuit duplication and implementation of real-time pattern recognition system, our design reduced the hardware functional units in the several operations such as multiplication and addition in algorithm. The cepstral parameters are modified and analyzed from our databases which are determined by our trained-model in the ASIC. These parameters can then be used as the basis for recognition. In addition, the discrimination of different motions made by the user was found by the dynamic timing warping (DTW) method using the cepstral parameters. The specification show that the operation clock rate is 2MHz, the core size is 0.84 X 0.84 mm2 , and the chip size is 1.789 X 1.789 mm2. Now the project goals are achieved and applying the SOC technology to improve the people healthcare and the use of the disability tools in the future.
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