帶通積分三角調變器可提供較高之動態範圍，使得帶通積分三角調變器適合用於通信系統中的中頻類比數位轉換器的應用。使用高階架構及多位元內部量化器之帶通積分三角調變器可以使帶通積分三角調變器在較低之超取樣率下，仍可以獲得高之動態範圍。

使用單級高階架構是提高帶通積分三角調變器動態範圍之方法之一，傳統之單級高階之帶通積分三角調變器架構包括了cascade-of- resonator with distributed feedback 及cascade-of-resonator with distributed feedforward.此架構之缺點之一在其係數間有較大之延展值，特別在帶通積分三角調變器之品質因數(Q)較高時，係數間之延展值也變大。本論文由系統架構上針對單級架構之係數間之延展值太大之問題提出一個新的架構，可有效的改善此係數間之延展值太大之問題，當此帶通積分三角調變器使用交換電容之電路技術實現時，可減少電路之電容面積。同時此新的架構和以往之單級架構相比較，也具備較不敏感之元件誤差影響程度。此外，此新的架構也允許帶通積分三角調變器之訊號轉換函數被單獨設計，其可以增加訊號轉換函數在頻帶外之雜訊之濾波能力。

高階單級之帶通積分三角調變器的係數設計是比較困難的，它常需要在各種複雜之設計因素與調變器所需之動態範圍及調變器穩定度等因素作來回之分析、考量，以得出一組符合晶片面積及操作速度要求且穩定之最佳係數。為加速帶通積分三角調變器之係數設計，本論文提出一個可以自動合成單級帶通積分三角調變器係數的設計工具，可對調變器所需之動態範圍、調變器之階數、取樣頻率、及內部之量化器等依設計者之設計考量(如晶片面積,操作速度等)作最佳化，此外也考量調變器係數對製程變化產生之元件匹配度及穩定度等因素。本方法可以有效地合成符合各種設計規格之帶通積分三角調變器係數，大大的減少設計高階單級之帶通積分三角調變器之分析及模擬時間。

Bandpass Sigma-Delta Modulators (BPSDMs) with a high dynamic range (DR) are a good solution for an intermediate frequency (IF) analog-to-digital converter (ADC). A high-order structure and a multi-bit internal quantizer resolution allows the BPSDM to have a high DR at a lower oversampling ratio (OSR).

Single-stage high-order structures are used for the BPSDM design in the research. Popular single-stage structures for BPSDMs include cascade-of-resonator with distributed feedback (CRFB), and cascade-of-resonator with distributed feedforward (CRFF). The two structures have a larger coefficient spread, especially when quality factor (Q) is high. A low-spread cascade-of-resonator with a distributed feedforward (LSCRFF) structure for high-order BPSDMs is presented in this thesis to significantly reduce coefficient spread problems. The coefficient spread can therefore be reduced, resulting in the reduced capacitance area in switched-capacitor BPSDM circuits. With component mismatch, peak signal-to-noise ratio (PSNR) degradation of the proposed structure is less than that of the conventional CRFB and CRFF structures, demonstrating a reduced sensitivity to component mismatch. In addition, the proposed structure also allows the noise transfer function (NTF) and signal transfer function (STF) to be designed independently. The STF can be designed to have sharp bandpass filtering.

Next, the design of optimal coefficients for high-order BPSDMs with single-stage structures is more difficult, involving exhaustive analysis, complicated design tradeoffs, instability problems, and a long design cycle. To improve productivity and time-to-market, design automation tools for BPSDMs are highly desirable. In this thesis, an automatic coefficient design methodology for discrete-time high-order BPSDMs with single-stage structures is presented. The methodology covers many design concerns including BPSDM coefficient tolerances for circuit component mismatch, design tradeoffs in in-band noise suppression, OSR, modulator orders and quantizer bit number. The proposed method succeeds in reducing the exhaustive analysis and the number of iterative simulations when designing high-order BPSDMs. Even for inexperienced designers, reliable and high-tolerance BPSDM coefficients for various applications can be automatically and efficiently generated.

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