本論文旨在研究具柔性切換之多階層功率因數修正器，藉由使用寬能隙半導體元件，使整體電路操作於高切換頻率，考量寬能隙開關元件耐壓普遍較低，因此透過多階層架構減少各開關元件之電壓應力，使該架構具有能應用於高壓、高切換頻率之特性。隨著切換頻率提升，更需重視電路上開關元件造成之損耗，因此透過加上輔助電路，達到主開關之零電壓導通，並分別進行原硬切換多階層功率因數修正器以及柔性切換版本之模式分析以及損耗討論，並針對電路元件參數以及控制迴路補償器之設計。最後透過模擬軟體，對該電路架構進行開迴路模擬，確認其於各輸入電壓範圍之零電壓導通之可行性，再將設計之補償器參數應用於該架構之回授控制，驗證可於300 kHz切換頻率下達到零電壓切換效果外，也確認輸出電壓可穩定於±400 V、功率因數為0.99，且於滿載3 kW時效率可達到98.02%等設計規格。

In this thesis, the multilevel power factor corrector (PFC) with soft-switching operation is developed. By employing wide bandgap semiconductor devices, the overall circuit operates at high switching frequency. Given that wide bandgap switches generally have lower voltage ratings, a multilevel architecture is utilized to reduce the voltage stress on each switch, making the architecture suitable for high-voltage, high-frequency applications. As the switching frequency increases, the losses caused by switching devices in the circuit become more significant. Therefore, an auxiliary circuit is incorporated to achieve zero-voltage switching (ZVS) for the main switches. The paper conducts mode analysis and loss discussion for both the original hard-switching multilevel power factor corrector and its soft-switching version. It also addresses the design of circuit component parameters and control loop compensators. Finally, open-loop simulations confirmed the feasibility of zero-voltage switching across various input voltages. Applying the designed compensator parameters in feedback control, the simulations verified that at a switching frequency of 300 kHz, the circuit achieved zero-voltage switching, stabilized the output voltage at ±400 V, maintained a power factor of 0.99, and reached 98.02% efficiency at a full-load of 3 kW.

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