台灣已走向老年化社會並逐步加重社會負擔，高齡社會已成為急需解決之社會議題。因此我們提出「具噪聲消除之低功率及低面積聲音辨識晶片設計」，期許此晶片能給予老人、幼童等較需要幫助之族群，即時的照護與救助。
本篇研究提出之自動化聲音辨識(Automatic Sound Recognition, ASR)晶片設計將採用梅爾規格倒頻譜係數(Mel-Frequency Cepstral Coefficients, MFCC)做為聲音辨識特徵，並針對雜訊干擾、聲音辨識率、未知聲音判斷、晶片功耗及面積大小等問題，提出硬體電路改進。最後，本篇研究提出一結合聲音活性檢測(VAD)與clock gating技術之晶片架構，能有效降低晶片待機狀態功耗，使其具備長時間運作能力，提升晶片之居家照護實用性。
實現方面，我們利用國家晶片系統設計中心(Chip Implementation Center, CIC)與台灣積體電路公司(TSMC)所提供的90奈米製程完成本晶片實作下線。晶片面積為1.15*1.15 mm2，以40支接腳封裝，閘總數(Gate Count)約為188k，消耗功率為2.803 mW，最高工作頻率為10 MHz。

Aged people has increased vastly in Taiwan and the social burden has increased, too. Aging society has become an urgent social issue which needs to be solved. Therefore, we proposed an “A Low-Power and Small Area Sound Recognition Chip Design with Noise Cancellation for Home Care System”, and we hope the chip can provide timely aid and care for elderly or children who need help.
This study proposed the automatic sound recognition (ASR) chip design that it adopts the Mel-frequency cepstral coefficients (MFCC) feature. Then, we modify the hardware circuit for the problem of noise interference, recognition accuracy, unknown sound detection, power consumption and area of chip. Finally, this study proposed a chip architecture that combines voice activity detection (VAD) and clock gating technique to reduce power consumption in idle state of chip, make it can operate longer and enhance the practicality for home care.
For implementation, we has been tape-out in TSMC’s 90nm process via Chip Implementation Center (CIC). The chip area is 1.15*1.15 mm2, 40-pin package, gate count is 188k, the power dissipation is 2.803 mW and the highest operation frequency is 10 MHz.

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