本論文提出一「新型低電壓大電流直流至直流轉換器」，其降壓比為傳統降壓型(Buck)轉換器的二分之一。此直流轉換器之輸出形式採用兩相式電感電流交錯輸出，可減少電感電流應力和降低輸出電流漣波；同時，電路本身具有兩相電流自動平衡之機制，而不需額外的均流控制電路。因此，此直流轉換器適合於低電壓大電流轉換之應用。於文中，將針對所提出之轉換器電路，探討其動作原理及電路特性，並推導此轉換器之電壓模式開迴路小訊號模型(Small-signal modeling)，以分析其系統穩定度並設計迴授補償網路。最後，實作一輸入電壓12 V和輸出規格1.5 V/ 40 A之雛型電路，以驗證本論文所提轉換器架構之可行性與正確性。

“A novel DC-DC converter for low output voltage and high output current” is proposed in this thesis. The voltage ratio of this converter is half of a conventional buck converter with the same duty cycle. Since the output current is the sum of two-phase inductor currents with 180 phase-shifts, therefore, the inductors’ current stress and the output current ripple can be effectively reduced. Moreover the currents through two-phase inductor can be balanced automatically, so an extra current-sharing control circuit is no longer required. Consequently, this novel DC-DC converter is suitable for low voltage and high current applications. This thesis first analyzes the proposed converter operating principles and circuit characteristics, and then derivates the voltage mode open-loop small-signal model to discuss the system stability and design the feedback compensator network. Eventually, a prototype circuit with input 12 V and output 1.5 V/ 40 A is implemented to verify the accuracy and feasibility of the proposed converter.

[1]N. H. E. Weste and D. Harris, CMOS VLSI Design: A Circuits and Systems Perspective, Third Edition, Addison Wesley, Inc., 2004.
[2]System Drivers, International Technology Roadmap for Semiconductors, 2007.
[3]A. I. Pressman, Switching Power Supply Design, Second Edition, McGraw-Hill, Inc., 1998.
[4]N. Mohan, T. M. Undeland and W. P. Robbins, Power Electronics: Converters, Applications and Design, Second Edition, John Wiley & Sons, Inc., 1995.
[5]M. Ye, P. Xu, B. Yang and F. C. Lee, “Investigation of topology candidates for 48 V VRM,” in Proc. IEEE APEC’02, Mar. 2002, vol. 2, pp. 699-705.
[6]Y. Ren, M. Xu, K. Yao and F. C. Lee, “Two-stage 48V power pod exploration for. 64-Bit microprocessor,” in Proc. IEEE APEC’03, Feb. 2003, vol. 1, pp. 426-431.
[7]X. Zhou, P. L. Wong, P. Xu, F. C. Lee and A. Q. Huang, “Investigation of candidate VRM topologies for future microprocessors,” IEEE Trans. on Power Electronics, vol. 15, no. 6, pp. 1172-1182, Nov. 2000.
[8]M. Orabi and M. El-Zanaty, “Comparison of different schemes for VRM application,” in Proc. IEEE INTELEC’06, Sep. 2006, pp. 1-8.
[9]P. K. Sim and Z. Salam, “Some issues on the design of a voltage regulator module (VRM) for microprocessor power supply,” in Proc. IEEE PECon’03, Dec. 2003, pp.110-116.
[10]A. Consoli, A. Testa, G.. Giannetto and F. Gennaro, “A new VRM topology for next generation microprocessors,” in Proc. IEEE PESC’01, June 2001, vol. 1, pp. 339-344.
[11]廖敏淳，「主動箝順向式轉換器與非對稱半橋轉換器之比較」，國立成功大學電機工程學系碩士論文，中華民國九十四年六月。
[12]B. R. Lin, H. K. Chiang, C. E. Huang and D. Wang, “Analysis, design and implementation of an active clamp forward converter with synchronous rectifier,” in Proc. IEEE Tencon’05, Nov. 2005, pp. 1-6.
[13]L. Huber and M. H. Jovanovic, “Forward-flyback converter with current-doubler rectifier analysis, design, and evaluation results,” IEEE Trans. on Power Electronics, vol. 14, no. 1, pp. 184-192, Jan. 1999.
[14]L. Balogh, “The current-doulber rectifier: an alternative rectification technique for push-pull and bridge converter,” Unitrode Design Note, DN-63, pp. 1-3, 1999.
[15]H. Wetzel, N. Frohleke, F. Meier and P. Ide, “Comparison of low voltage topologies for voltage regulator modules,” in Proc. IEEE IAS’02, Dec. 2002, vol. 2, pp. 1323-1329.
[16]Y. Panov and M. M. Jovanovic, “Design and performance evaluation of low-voltage high-current DC/DC on-board modules,” IEEE Trans. on Power Electronics, vol. 16, no. 1, pp. 26-33, Jan. 2001.
[17]吳義利，「自激式同步倍流整流對稱半橋轉換器之研究」，國立成功大學電機工程學系碩士論文，中華民國九十二年六月。
[18]吳健銘，「降壓同步倍流整流半橋轉換器之研究」，國立成功大學電機工程學系碩士論文，中華民國九十三年六月。
[19]W. Chen, P. Xu and F. C. Lee, “The optimization of asymmetric half bridge converter,” in Proc. IEEE APEC’01, Mar. 2001, vol. 2, pp. 703-707.
[20]R. Chen, J. T. Strydom and J. D. vanWyk, “Design of planar integrated passive module for zero-voltage-switched asymmetrical half-bridge PWM converter,” IEEE Trans. on Industry Applications, vol. 39, no. 6, pp. 1648-1655, Nov. 2003.
[21]N. H. Kutkut, “A full bridge soft switched telecom power supply with a current doubler rectifier,” in Proc. IEEE INTELEC’97, Oct. 1997, pp. 344-351.
[22]B. R. Lin, K. Huang and D. Wang, “Analysis and implementation of full-bridge converter with current doubler rectifier,” in Proc. IEE Electric Power Applications, Sep. 2005, vol. 152, pp. 1193-1202.
[23]B. Andreycak, “Phase shifted, zero voltage transition design considerations and the UC3875 PWM controller,” Unitrode Application Note, U-136A, pp. 1-14, May 1997.
[24]H. M, J. A. Abu-Qahouq, S. Luo and I. Batarseh, “Zero-voltage-switching (ZVS) two-stage approaches with output current sharing for 48 V input DC-DC converter,” in Proc. IEEE APEC’04, 2004, vol. 2, pp. 1078-1082.
[25]李文凱，「電流饋入推挽式轉換器之研製」，國立成功大學電機工程學系碩士論文，中華民國九十五年六月。
[26]D. Maksimovic and S. Cuk, “Switching converters with wide DC conversion range,” IEEE Trans. on Power Electronics, vol. 6, no. 1, pp. 151-157, Jan. 1991.
[27]P. Xu, J. Wei, K. Yao, Y. Meng and F. C. Lee, “Investigation of candidate topologies for 12 V VRM,” in Proc. IEEE APEC’02, Mar. 2002, vol. 2, pp. 686-692.
[28]K. Yao, M. Ye, M. Xu and F. C. Lee, “Tapped-inductor buck converter for high-step-down DC-DC conversion,” IEEE Trans. on Power Electronics, vol. 20, no. 4, pp. 775-780, July 2005.
[29]J. Qian, “Active clamp step-down converter with power switch voltage clamping function,” US Patent 6,512,352, Jan. 2003.
[30]K. Nishijima, K. Harada, T. Nakano, T. Nabeshima and T. Sato, “Analysis of double step-down two-phase buck converter for VRM,” in Proc. IEEE INTELEC’05, Sep. 2005, pp. 497-502.
[31]K. Nishijima, K. Harada, T. Nakano, T. Nabeshima and T. Sato, “A double step-down two-phase buck converter for VRM,” in Proc. IEEE PECon’05, 2005, pp. 1-8.
[32]R. D. Middlebrook, “Small-signal modeling of pulse-width modulated switched-mode power converters,” in Proc. IEEE Invited paper, Apr. 1988, vol. 76, no. 4, pp. 343-354.
[33]V. Vorperian, R. Tymerski and F. C. Lee, “Equivalent circuit models for resonant and PWM switches,” IEEE Trans. on Power Electronics, vol. 4, no. 2, pp. 205-214, Apr. 1989.
[34]T. F. Wu and Y. K. Chen, “Modeling PWM DC/DC converters out of basic converter units,” IEEE Trans. on Power Electronics, vol. 13, no. 5, pp. 870-881, Sep. 1998.
[35]UC3825 Datasheet, Texas Instrument, 2008.
[36]Y. Dong, M. Xu and F. C. Lee, “Evaluation of coupled inductor Voltage Regulators,” in Proc. IEEE APEC’08, Feb. 2008, pp. 831-837.
[37]P. L. Wong, P. Xu, B. Yang and F. C. Lee, “Performance improvements of interleaving VRMs with coupling inductors,” IEEE Trans. on Power Electronics,
vol. 16, no. 4, pp. 499-507, July 2001.