由於近年來消費者對於顯示器畫面品質的要求不斷上升，因此具備高解析度及高更新頻率的平面顯示器已成為市場主流。然而在平面顯示器技術中，主動式有機發光二極體顯示器會因為薄膜電晶體臨界電壓漂移之現象，影響畫素電路的電流穩定度並造成畫面亮度不均之問題。此外對於高解析度主動式液晶顯示器而言，掃描線上的負載會因為畫素增加而上升，造成採用傳統架構的氫化非晶矽閘極驅動電路之輸出波形上升時間及下降時間過長，使畫素電路中的開關薄膜電晶體無法在正確的時間開啟及關閉，導致畫素電路無法被寫入正確的資料電壓。
針對上述之問題，本論文提出一個以非晶相銦鎵鋅氧化物薄膜電晶體設計並具備精簡架構之畫素補償電路，以及三個以氫化非晶矽薄膜電晶體設計並具備較高驅動能力之閘極驅動電路。第一個電路為採用同步式發光並適用於三維主動式有機發光二極體顯示器之畫素補償電路，其電路架構僅由三個薄膜電晶體及一個電容所組成，因此具有較高的開口率，根據模擬結果，當驅動薄膜電晶體的臨界電壓漂移1 V時，其相對電流誤差率在所有資料電壓範圍內皆小於6.5%。第二個電路為使用兩階段電壓抬升架構以改善輸出波形上升及下降時間之閘極驅動電路，其電路架構由九個薄膜電晶體及三個電容所組成，其驅動薄膜電晶體的閘極端電壓在電路輸出端開始充電及放電之前分別被抬升至更高的電壓準位，因此不需要增加驅動薄膜電晶體的元件尺寸，即可改善電路驅動能力。根據實際下線的測試電路量測結果，此電路在70 °C的環境中連續操作120小時之後，其輸出波形之上升時間、下降時間及電壓擺幅分別為2.05 μs、1.31 μs及27.1 V。第三個電路為可雙向操作並具備快速充放電能力之閘極驅動電路，其電路架構由十一個薄膜電晶體及三個電容所組成，其對稱電壓抬升架構可在輸出波形開始上升及下降之前，分別將驅動薄膜電晶體的閘極端電壓抬升至更高電壓準位，模擬結果顯示其輸出波形之上升時間及下降時間分別為2.91 μs及1.89 μs。第四個電路為使用電壓預抬升架構，以加快電路輸出端充放電速度之閘極驅動電路，其電路架構由九個薄膜電晶體及兩個電容所組成，其驅動薄膜電晶體閘極端在第一階段操作時，可同時經由輸入薄膜電晶體及電壓預抬升架構進行充電，因此可將驅動薄膜電晶體閘極端充電至較高的電壓準位，模擬結果顯示其輸出波形之上升時間及下降時間分別為1.71 μs及1.63 μs。

SUMMARY
This thesis proposes one amorphous indium-gallium-zinc-oxide (a-IGZO) pixel circuit for use in active-matrix organic light-emitting diode (AMOLED) displays, and three hydrogenated amorphous silicon (a-Si:H) gate driver circuits for use in high-resolution active-matrix liquid-crystal displays (AMLCDs). Chapter 2 proposes a 3T1C compensation pixel circuit, which increases the aperture ratio of displays due to the simple structure. Chapter 3 proposes a 9T3C gate driver circuit, which adopts a two-step-bootstrapping structure to improve the rising time and falling time of the output waveform. However, this circuit can only execute unidirectional transmission, and the charging time of the gate node of the driving thin-film transistor (TFT) is decreased owing to the overlapping clock signals. Thus, chapter 4 proposes two gate driver circuits to solve the issues mentioned above. The first circuit is an 11T3C bidirectional gate driver circuit, which adopts a symmetrical-bootstrapping structure to enhance the driving capability of the driving TFT. The second circuit is a 9T2C gate driver circuit, which uses a pre-bootstrapping to accelerate the charging and discharging of the output node.

INTRODUCTION
In recent years, flat panel displays with high resolution and high frame rate have become mainstream of display market owing to the advantage of providing impressive image quality to consumers. However, among various flat panel display technologies, active-matrix organic light-emitting diode (AMOLED) displays should consider the issue of the threshold voltage shift of driving thin-film transistor (TFT) for uniform brightness. Furthermore, for high-resolution active-matrix liquid-crystal displays (AMLCDs), the numerous pixels result in high loading on the row line, and thus increase the rising time and falling time of the output waveform generated by hydrogenated amorphous silicon (a-Si:H) gate driver circuits with conventional structure. Therefore, the switching TFT in pixels cannot be turn on and off at correct time for inputting desired data voltage.

PROPOSED CIRCUITS AND ANALYTICAL RESULTS
This thesis proposes one amorphous indium-gallium-zinc-oxide (a-IGZO) pixel circuit with concise structure, and three a-Si:H gate driver circuits with enhanced driving capability.
The first a-IGZO compensation pixel circuit adopts simultaneous emission (SE) driving scheme, and is suitable for use in stereoscopic three-dimensional (3-D) AMOLED displays. The proposed pixel circuit is composed of only three TFTs and one capacitor, so the aperture ratio can be increased due to the simple circuit structure. According to the simulation results, as the threshold voltage of the driving TFT is shifted by 1 V, the relative current error rates of the proposed pixel circuit are less than 6.5% over the entire input data range.
The second a-Si:H gate driver circuit uses a two-step-bootstrapping structure to improve the rising time and falling time of the output waveform. The proposed circuit consists of nine TFTs and three capacitors. The gate voltage of the driving TFT are bootstrapped to high voltage levels before the output node starts to be charged and discharged, so the driving capability of the proposed gate driver circuit is ameliorated without increasing the size of the driving TFT. The test key of the proposed circuit is fabricated using a-Si:H technology. Experimental results show that the proposed circuit can stably generate output waveform after being operated at 70 °C for 120 hours, and the rising time, falling time, and voltage swing of the measured output waveform are 2.05 μs, 1.31 μs, and 27.1 V, respectively.
The third proposed circuit is a bidirectional a-Si:H gate driver circuit with high charging and discharging speeds. The proposed circuit is composed of eleven TFTs and three capacitors. The symmetrical-bootstrapping structure adopted in the proposed circuit is used to increase the gate voltage of the driving TFT before the output waveform starts to rise and fall. Simulation results show that the rising time and falling time of the output waveform are 2.91 μs and 1.89 μs, respectively.
The fourth a-Si:H gate driver circuit uses a pre-bootstrapping structure to accelerate the charging and discharging of the output node. The proposed circuit is composed of nine TFTs and two capacitors. At the first period of the circuit operation, the gate node of the driving TFT is charged through the input TFT and the pre-bootstrapping structure, so the gate voltage of the driving TFT can be increased owing to the higher charging speed. The rising time and falling time of the simulated output waveform are respectively 1.71 μs and 1.63 μs.

CONCLUSION
This thesis proposes one a-IGZO AMOLED pixel circuit, and three a-Si:H gate driver circuits. The proposed pixel circuit successfully compensates for threshold voltage shift of the driving TFT, and increases the aperture ratio of displays due to the concise structure. The three proposed a-Si:H gate driver circuits adopt different driving structure to enhance the charging and discharging capabilities of the driving TFT. Therefore, the rising time and falling time of the output waveform generated by gate driver circuits can be shortened.

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