| 研究生: |
李文凱 Lee, Wen-Kai |
|---|---|
| 論文名稱: |
電流饋入推挽式轉換器之研製 Study and Implementation of a Current-fed Push-Pull Converter |
| 指導教授: |
陳建富
Chen, Jiann-Fwu 梁從主 Liang, Tsorng-Juu |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2006 |
| 畢業學年度: | 94 |
| 語文別: | 中文 |
| 論文頁數: | 65 |
| 中文關鍵詞: | 電流饋入推挽式 、雙級式 、降壓式 、推挽式 |
| 外文關鍵詞: | current-fed push-pull, two-stage, push-pull, buck |
| 相關次數: | 點閱:160 下載:9 |
| 分享至: |
| 查詢本校圖書館目錄 查詢臺灣博碩士論文知識加值系統 勘誤回報 |
本論文主要研製「電流饋入推挽式轉換器」,此電路為雙級式電源供應器,前級為降壓式轉換器,功能為調節輸出電壓,而後級為推挽式轉換器,提供電氣隔離與電壓轉換功能。此架構非常適合應用於低電壓大電流之負載及廣泛的輸入電壓。本論文首先探討此電路之特性與優缺點,其次是分析推挽式轉換器操作於責任週期50%之工作原理,並做穩態分析。最後實作一部「電流饋入推挽式轉換器」,轉換器之輸入電壓為36~72V,輸出為2.5V/70A,當輸入電壓為48V時,滿載效率為82.3%;當輸出電流為20A時,轉換器之效率可達91.3%。
This thesis mainly studies and implements a current-fed push-pull converter, which is two-stage power supply. The first stage is a buck converter with the output voltage regulator function, and the second is a push-pull converter with the electrical isolation and step-down function. The topology is very suitable for low-output-voltage, high-output-current applications with a wide input voltage range. First, the characteristics of the topology are discussed, and the operation principle of the push-pull converter with a 50% duty cycle is studied in this thesis. Finally, a current-fed push-pull buck converter with a 36~72VDC input voltage range and 1.5V/70A output is performed. The experimental results show that efficiency of the proposed converter is 82.3% at full load condition and the maximum efficiency is 91.3% at 20A output current.
參考文獻
[1]C. Y. Chang, and S. M. Sze, ULSI Device, John Wiley & Sons, 2000.
[2]M. Ye, P. Xu, B. Yang, and F. C. Lee, “Investigation of topology
candidates for 48V VRM,” IEEE APEC’ 2002, pp.699-705
[3]L. Huber, and M. J. Milan “Forward-flyback converter with current-doubler
rectifier: analysis, design, and evaluation results,” IEEE Trans. on Power
Electronics, vol.14, no.1, January 1999, pp. 184-192.
[4]L. Huber, D. sable, G. Hua, and F. C. Lee “Design of a high-efficienc
power converter for a satellite solid-state power amplifier,"IEEE
APEC'1994, pp. 645-651.
[5]H. Wetzel, N. Frohleke, F. Meier, and P. Ide, “Comparison of low voltage
topologies for voltage regulator modules,” IEEE IAS’ 2002, pp. 1323-1329.
[6]吳義利,「自激式同步倍流整流對稱半橋轉換器之研究」,國立成功大學電機工程
研究 所碩士論文,民國九十二年。
[7]P. Yuri, and M. J. Milan, “Design and performance evaluation of low
voltage/high current DC/DC on board modules,” IEEE Trans. on Power
Electronics, vol.16, no.1, January 2001, pp. 26-33.
[8]R. Chen, J. T. Strydom, and J. D. Van Wyk, “Design of planar integrated
passive module for zero-voltage switched asymmetrical half bridge PWM
converter,” IEEE IAS’ 2001, pp. 2232- 2237.
[9]Y. C. Ren, M. Xu, K. W. Yao, and F. C. Lee, “Two-stage 48V power pod
exploration for 64-bit microprocessor,” IEEE APEC’ 2003, pp. 426-431.
[10]H. Mao, A. Qahouq, J. A. Luo, and Batarseh, “Zero-voltage-switching (ZVS)
two-stage approaches with output current sharing for 48 V input DC-DC
converter,” IEEE APEC’ 2004, pp.1078-1082.
[11]B. Arbetter, and D. Maksimovi, “Feed-forward pulse-width modulators for
switching power converters,” PESC’ 1995, pp. 601-607.
[12]P. Alou, J. Oliver, J. A. Cobos, O. Garcia, and J. Uceda, “Buck+half
bridge (d=50%) topology applied to very low voltage power converters,”
IEEE APEC’ 2001, vol.2, pp.715-721.
[13]吳健銘,「降壓同步倍流整流半橋轉換器之研究」,國立成功大學電機工程研究所
碩士論文,民國九十三年。
[14]黃鈞平,「降壓饋入式同步倍流整流半橋轉換器之研究」,國立成功大學電機工程
研究所碩士論文,民國九十四年。
[15]W. Chen, P. Xu, and F. C. Lee,” The optimization of asymmetric half
bridge converter,” IEEE APEC’ 2001, vol.2, pp. 703-707.
[16]X. Ruan, J. Wang, and Q. Chen, “An improved current-doubler- rectifier
ZVS PWM full-bridge converter,” IEEE PESC’ 2001, pp.1749-1754.
[17]Abraham I. Pressman, “Switching Power Supply Design,” 2/E McGraw-Hill
Co. New York, 1999.
[18]E. T. Calkin, and B. H. Hamilton, “A conceptually new approach for
regulated DC to DC converters employing transistor switches and pulse
width control,” IEEE Trans. on industry applications July 1976,
pp. 369-377.
[19]P. Alou, J. A, A. Cobos, R. Prieto, O. Garcia, and J. Uceda, “A two
stage voltage regulator module with fast transient response capability,”
IEEE PESC’ 2003, pp.138-143.
[20]M. F. Schlecht, “High Efficiency Power Converter” U. S. Patent
No.0010637, Aug. 2001.
[21]X. Gao, and R. Ayyanar, “A high-performance, integrated magnetic scheme
for buck-cascaded push-pull converter,” IEEE Power Electronic Letters,
March 2004, pp. 29-33.
[22]L. A. Flores, A. Soto, P. Alou, O. Garcia, and J. A. Cobos, ”Current fed
push-pull topology with self driven synchronous rectification applied to
low voltage,” IEEE CIPE’ 2004, pp. 61-66.
[23]D. A. Filho, and W. C. P. I. Barbi, ”A comparison between two current-fed
push-pull DC-DC converters-analysis, design and experimentation,”
IEEE INTELEC’96, pp. 313-320.
[24]H. Tanaka, T. Ninomiya, Y. Okabe, and T. Zaitsu, “Eddiciency improvement
of Synchronous Rectifier in A ZVS-PWM Controlled Series-Resonant Converter
with Active Clamp,” IEEE APEC’ 2000, pp. 679-685.
[25]I. D. Jitaru, and G. Cocina, “High efficiency DC-DC converter,”
IEEE APEC’94, pp. 638-644.
[26]M. M. Jovanovic, M. T. Zhang, and F. C. Lee, “Evaluation of
synchronous-rectification efficiency improvement limits in forward
converters,” IEEE Trans. on Industrial Electronics ,Vol. 42, No. 4, 1995.
[27]Y. Nakayashiki, H. Shimamori, T. Satoh, T. Ohno, S. Yamashita, K.
Fuchigami, and T. Yamamoto, “High efficiency switching power supply
unit with synchronous rectifier,” IEEE INTELEC’ 1999, pp. 398-403.
[28]G. Stojcic, and C. Nguyen, “MOSFET synchronous rectifiers for isolated
board-mounted DC-DC converters,” IEEE INTELEC’ 2000, pp. 258-266.