| 研究生: |
洪宗緯 Hung, Tsung-Wei |
|---|---|
| 論文名稱: |
高能源效率之區塊式可擴充性蒙哥馬利乘法器 Energy-efficient Block-based Scalable Montgomery Multiplication Design |
| 指導教授: |
謝明得
Shieh, Ming-Der |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2013 |
| 畢業學年度: | 101 |
| 語文別: | 中文 |
| 論文頁數: | 60 |
| 中文關鍵詞: | 密碼學系統 、高能量效率設計 、蒙哥馬利乘法 、可擴充性設計 、超大型積體電路 |
| 外文關鍵詞: | cryptosystems, energy-efficient design, Montgomery modular design, scalable architecture, VLSI |
| 相關次數: | 點閱:97 下載:4 |
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現今透過行動裝置對網路存取資料,傳輸個人訊息的安全機密顯得日益重要。例如手機因為受限於電池容量,因此需要一個節能的密碼學系統來保護訊息傳輸。模乘法運算廣泛地應用在公開金鑰密碼學系統。故此篇論文將介紹一個高能源效率之區塊式可擴充性蒙哥馬利乘法器。
提出映射至硬體架構的方式以及延遲資料處理的技巧。不僅減少核心管線化暫存器的切換邏輯閘次數以及外部記憶體存取次數,同時亦能支援任意運算元長度的蒙哥馬利乘法運算。實現結果使用台灣積體電路製造公司提供的90奈米製程資料,與其他文獻相比,一旦處理更大的運算元長度,造成所有核心處理單元無法平行化處理運算字元總數的狀況下,即可證實我們提出的高能源效率之蒙哥馬利乘法器處理一次蒙哥馬利乘法運算,能量耗損比其他文獻擁有8.2%至59.1%的減少幅度。
Nowadays, security requirements are increasingly important for private data transmission through mobile devices with Internet access, such as smart phones, which require an energy-efficient cryptosystem due to the limitation of battery capacity. Modular multiplication is widely used in public key cryptosystems. This thesis presents an energy-efficient block-based scalable Montgomery modular multiplication design.
Using the proposed architecture mapping scheme and deferred scheme in dependency graph, not only reduces the switching activity of pipeline registers in kernel and memory access, but also supports any precision of operands. Experimental results based on TSMC 90-nm CMOS technology show that compared to the related works under the number of words larger than the number of processing elements, the proposed design achieves 8.2% to 59.1% energy reduction than related work for completing one Montgomery modular multiplication.
[1] R. Rivest, A. Shamir, and L. Adleman, “A method for obtaining digital signatures and public-key cryptosystems,” Commun. ACM, vol. 21, pp. 120-126, Feb. 1978.
[2] N. Koblitz, “Elliptic curve cryptosystems,” Math. Computation, vol. 48, pp. 203-209, 1987.
[3] V.S. Miller, “Use of elliptic curve in cryptography,” in Proc. Adv. Cryptography (Crypto), 1986, pp. 417-426.
[4] P.L. Montgomery, “Modular multiplication without trial division,” Math. Computation, vol. 44, pp. 519-521, Apr. 1985.
[5] W. Stallings, Cryptography and Network Security: Principles and Practice, 5th, Prentice Hall, 2010.
[6] A.J. Menezes, Elliptic curve public key cryptosystems 1st, Springer, 1993.
[7] C.C. Yang, T.S. Chang, and C.W. Jen, “A new RSA cryptosystem hardware design based on Montgomery’s algorithm,” IEEE Trans. Circuits Sys. Part II: Analog and Digital Signal Processing, vol. 45, no. 7, pp. 908-913, Jul. 1998.
[8] C. McIvor, M. McLoone, and J.V. McCanny, “Modified Montgomery modular multiplication and RSA exponentiation techniques,” IEE Proc.-Comp. Digit. Tech., vol. 151, no. 6, pp. 402-408, Nov. 2004.
[9] M.D. Shieh, J.H. Chen, H.H. Wu, and W.C. Lin, “A new modular exponentiation architecture for efficient design of RSA Cryptosystem,” IEEE Trans. Very Large Scale Integr. (VLSI) Syst., vol. 16, no. 9, pp. 1151-1161, Sept. 2008.
[10] F. Tenca and K. Koc, “A scalable architecture for Montgomery multiplication,” in Proc. Cryptographic Hardware and Embedded Syst., LNCS 1717, 1999, pp. 94-108.
[11] F. Tenca and K. Koc, “A scalable architecture for modular multiplication based on Montgomery’s algorithm,” IEEE Trans. Comput., vol. 52, no. 9, pp. 1215-1221, Sept. 2003.
[12] D. Harris, R. Krishnamurthy, S. Mathew, and S. Hsu, “An improved unified scalable radix-2 Montgomery multiplier,” in Proc. IEEE Symp. Comput. Arith., 2005, pp. 1196–1200.
[13] M.D. Shieh and W.C. Lin, “Word-based Montgomery modular multiplication algorithm for low-latency scalable architectures,” IEEE Trans. Comput., vol. 59, no. 8, pp.1145-1151, Aug. 2010.
[14] M. Huang, K. Gaj, and T. El-Ghazawi, “New hardware architectures for Montgomery modular multiplication algorithm,” IEEE Trans. Comput., vol. 60, no. 7, pp. 923-935, Jul. 2011.
[15] W.C. Lin, J.H. Ye, and M.D. Shieh, “Scalable Montgomery modular multiplication architecture with low latency and low memory bandwidth requirement,” IEEE Trans. Comput., 2012 (in press).
[16] C.D. Walter, “Montgomery exponentiation needs no final subtractions,” Electron. Lett., vol. 32, no. 21, pp.1831-1832, Oct. 1999.
[17] K.K. Parhi, VLSI Digital Signal Processing Systems: Design and Implementation, Wiley, 1999.
[18] NIST Special Publication 800-57 – Recommendation for Key Management Part1 – General, National Institute of Standard and Technology, Mar. 2007.
[19] N. Weste and D. Harris, CMOS VLSI Design: A Circuits and Systems Perspective, 3/E, Addison-Wesley, 2004.
[20] CIC referenced flow for cell-based IC design, CHIP Implementation Center, CIC, Taiwan, Document no. CIC-DSD-RD-08-01, 2008.