故障診斷對於提升晶片良率扮演很重要的腳色，由於電路結構和自動測試向量產生工具的限制，即便使用測試向量和診斷向量，電路中仍存在許多無法分開的錯誤對，其中包含等效錯誤對和終止錯誤對，本篇論文提出一種基於掃描式的診斷-修復架構，可以透過修復電路缺陷來分開錯誤對，我們提出了一種可以修復標準元件的技術，使得有缺陷邏輯閘的修復更容易控制。為了有效區分所有錯誤對，我們開發了一個新的故障分組方法，並將其運用在我們提出的診斷-修復架構中，基於這個架構，我們可以同時分開多組錯誤對並修復有缺陷的邏輯閘以提高良率，實驗結果顯示我們只需要很小的面積負擔，就能夠分開關鍵的錯誤對，同時修復有缺陷的邏輯閘。

Fault diagnosis plays a major role in IC yield enhancement. Due to circuit structure and ATPG limitation, there exist many undistinguished fault pairs after applying test patterns and diagnosis patterns, including equivalent fault pairs and aborted fault pairs. This thesis proposes a scan-based repair-for-diagnosis architecture that can distinguish undistinguished fault pairs by repairing cell defects. A repairable standard cell design technique is presented that makes the repair of defective cells easy to control. To efficiently distinguish all targeted undistinguished fault pairs, a novel fault-grouping method is developed and applied to the proposed scan-based repair-for-diagnosis architecture. With this architecture, one can distinguish multiple fault pairs and repair those defective cells hence improving yield at the same time. Experimental results show that our proposed architecture can distinguish all targeted undistinguished fault pairs and repair the defective cells with low area overhead.

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