| 研究生: |
廖哲宏 Liao, Che-Hong |
|---|---|
| 論文名稱: |
應用於IEEE802.11a WLAN之5.7GHz CMOS射頻接收機及功率放大器RFICs 5.7GHz CMOS RF Receiver And PA RFICs For IEEE802.11a WLAN Applications |
| 指導教授: |
莊惠如
Chuang, Huey-Ru |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2003 |
| 畢業學年度: | 91 |
| 語文別: | 中文 |
| 論文頁數: | 128 |
| 中文關鍵詞: | 射頻接收機 、功率放大器 |
| 外文關鍵詞: | RF receiver, PA, power amplifier |
| 相關次數: | 點閱:115 下載:7 |
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本論文以TSMC 0.18mm 1P6M CMOS 製程來研製應用於802.11a WLAN 之5.7GHz CMOS 接收機與功率放大器RFICs。接收機規劃上,RF 為5.725~5.825GHz,經5.265~5.325GHz本地振盪器降至中頻480MHz。本地振盪訊號由一5GHz LC tank CMOS VCO (0.25mm)整合設計之PLL 頻率合成器模組提供。RFIC 晶片採用打鎊線至FR-4 基板上進行量測。CMOS RF 接收機之電流共用低雜訊放大器增益為11dB,雜訊指數為4.2dB,input P1dB 為-11dBm;主動雙端平衡混波器轉換增益為11.06dB,雜訊指數12.8dB input P1dB 為-16.4dBm;L-C tank 壓控振盪器在0~1.8V 控制輸出頻率為5099~5242MHz,經鎖頻後,相位雜訊為-90.8dBc/Hz@100KHz;兩級A 類CMOS 功率放大器頻率響應偏移至5.98GHz 左右,增益為10.4dB,output P1dB 約12.5dBm。5GHz 頻率合成器模組(內含5GHz CMOS VCO),參考頻率為1MHz,通道最小解析度為4MHz,頻道跳躍20MHz 時,settling time 約71.3ms,突波與載波比約-58dBc 。
在CMOS RF 接收機整合測試中,包含CMOS LNA、mixer 與頻率合成器模組並置入RF、IF 帶通濾波器。整體轉換增益為19.1dB,雜訊指數為6.6dB,input P1dB約-30.8dBm。在QPSK、18Mbs OFDM 測試訊號下,EVM 值為2.57%,64QAM、54Mbs OFDM 測試訊號下,EVM 為1.96%。
本論文並有研製0.25mm 5.7GHz CMOS 低雜訊放大器與混波器及0.18mm5GHz CMOS 可切換電容調整式之壓控振盪器(列於附錄)
This thesis presents the development of 5.7 GHz CMOS RFICs for the IEEE802.11a WLAN RF receiver and a 5.7 GHz two stage class-A CMOS PA in TSMC standard 0.18mm CMOS process. The CMOS RF receiver includes a differential LNA with gain control, an active double-balanced mixer, and an L-C tank CMOS VCO. The RF is from 5.725 to 5.825 GHz, the LO is from 5.265 to 5.325GHz and the IF is at 480MHz. The LNA exhibits a gain of 11dB, noise figure of 4.2dB and input P1dB of -11dBm. The mixer exhibits a conversion gain of 11.06dB, noise figure of 12.8dB and input P1dB of –16.4dBm. The L-C tank CMOS VCO has an output frequency from 5099 to 5242MHz with -90.8dBc/Hz@100KHz phase noise. The VCO is used in a designed 5-GHz frequency synthesizer. The synthesizer with a spur below 58dBc has a settling time of 71.3ms for 20MHz step. The 5.7-GHz CMOS RF receiver (with the frequency synthesizer) exhibits a conversion gain of 19.1dB, noise figure of 6.6dB, input P1dB of –30.8dBm. For the digital modulation measurement, a 5.744MHz 802.11a 18Mbps and 54Mbps OFDM signal are applied to the receiver. The measured EVM is about 2.57%(QPSK) and 1.96%(64QAM).
The measured frequency response of the two-stage class-A CMOS PA shifts from 5.75GHz to 5.98GHz. The PA exhibits a gain of 10.4dB and output P1dB of 12.5dBm. Also a 5.7GHz 0.25-mm CMOS LNA and mixer and a 5GHz 0.18-mm CMOS VCO with switched capacitance are prsented in appendix.
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