本論文提出一個基於壓控振盪器架構之二階連續時間式電流感測三角積分調變器電路，此電路架構不需使用放大器即可對輸入電流訊號進行量化，應用了比例積分前饋技術，可以有效降低整體電路的複雜度，電路設計目標為高FoMs與高解析度，適合作為物聯網中電流式的感測器應用。
製程使用0.18 μm 1P6M來實現二階連續時間式電流感測三角積分調變器電路，此三角積分調變器應用比例積分前饋技術的架構，在輸入級使用電阻串接額外的電容，不僅取代第二條回授電路的使用，亦維持整體系統的穩定，並實現一電流積分器，再搭配第二級壓控振盪器實現之相位積分器，達成二階的雜訊整形成效，有效抑制量化雜訊造成的誤差。選取電流式數位類比轉換器做為回授路徑，以互補式的架構組成，用來降低偶次諧波造成的非線性失真，提升整體三角積分調變器之效能。
量測結果顯示，在供應電壓為1.2V的情況下，SNDR為74.6 dB，功耗為44.8 μW，FoMs可以達到160.76 dB，其規格與已知文獻中電流式三角積分調變器相比，皆有不錯的表現。
關鍵字： 比例積分技術、電流讀取電路、基於環形振盪器架構之連續時間式三角積分調變器

This paper proposes a voltage-controlled oscillator (VCO)-based 2nd-order continuous-time delta-sigma modulator (CTSDM) for current-sensing readout systems. The proposed VCO-based CTSDM can immediately quantize the current signal from sensor without pre-amplifier. A proportional-integral (PI) structure has been realized by injecting a resistor in series with the integrating capacitor to simplify the circuit complexity as well as maintain the system stability. A noise shaping with second order is implemented by the first-stage PI current integrator and a second-stage VCO phase integrator. The complementary current-steering digital-to-analog converter is adopted as the feedback path for the current subtraction. Measurement results show that the proposed current-sensing VCO-based CTSDM can achieve a signal-to-noise-and-distortion ratio (SNDR) of 74.6 dB in 10 kHz bandwidth while consuming only 44.8 μw under 1.2 V supply. This corresponds to a Figure-of-Merit (FoM) of 160.76 dB which is suitable for sensor readout applications in internet of thing (IoT).
Keywords: sensor readout circuit, direct sensing technique, VCO-based, continuous-time delta-sigma modulator, proportional-integral structure.

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