本論文主要在於探討二氧化矽(SiO2)與氧化鉭(Ta2O5)兩種介電材料的材料特性。在積體電路中，以二氧化矽作為絕緣層的金氧半(MOS)元件則扮演著相當重要的角色。當元件的尺寸縮小時，絕緣層的厚度也相對地必須變薄，以符合元件的需求。但此刻薄膜的絕緣能力將因而變差，造成元件的漏電流變大。為了有效降低絕緣薄膜的漏電，各種的技術相繼的研發出來，以期能成長出更高品質的氧化薄膜。
本文中所研究的二氧化矽薄膜是以原處蒸汽產生(in-situ steam generation)法為基礎的快速熱處理(RTP)系統所成長的。由實驗的結果顯示，稀釋蒸汽的快速熱氧化法所成長出的二氧化矽(ISSG wet SiO2)薄膜與傳統爐管濕氧化法所成長出之二氧化矽(furnace wet SiO2)薄膜相較之下，可以更有效的降低漏電流、加強崩潰電場與元件的可靠度。而且ISSG二氧化矽也比乾式快速熱氧化法所長出之二氧化矽(dry RTO oxide)具有更好的電特性。接著將成長後未經任何處理的ISSG二氧化矽放置在充滿氮氣(N2)或一氧化氮(NO)的環境中進行高溫熱處理，以改善其薄膜特性。由實驗的結果得知，在一氧化氮的環境下進行熱處理後，可以有效減少電荷的陷落(charge trapping)、擁有較高的電荷乘載力(Qbd)與較高的電子移動率(electron mobility)，以及更能承受通道熱載子所產生的影響(channel hot carrier)。總括這些電性的改進主要歸因於氮原子加入到二氧化矽與矽基板(SiO2/Si)的界面層附近後，進而改善了界面過渡層(SiOx)的結構特性。
除了改善二氧化矽的品質特性外，在本文中也探討以具有高介電常數的材料來取代二氧化矽作為閘極介電層之可行性。由於氧化鉭(Ta2O5)具有高介電常數(約25)、良好的披覆特性(step coverage)與高介電強度(dielectric strength)，因此以其作為研究題材。以低壓化學氣相沈積法(LPCVD)沈積厚度約為10.5奈米的氧化鉭薄膜在P型矽基板上，之後再將晶片放置於攝氏500度至800度充滿氧氣的爐管中進行高溫熱處理，以改善其電特性。由實驗結果得知在攝氏700度以下熱處理後的電容器，其電特性主要由氧化鉭所主導。當熱處理的溫度高於攝氏700度，則電容器的電特性則轉變為由界面過渡層所主導。此外，當熱處理的溫度高於材料結晶溫度，則由於材料的結晶化，將造成薄膜表面的粗糙化與造成產生較大的漏電流。對於未經熱處理的氧化鉭薄膜而言，在低電場作用下時，其電流傳導是由hopping conduction或Poole-Frenkel emission所主導。而在高電場作用下，其電傳導特性則是由Fowler-Nordheim tunneling所主導。 對於已經結晶的氧化鉭薄膜，在高電場作用下，其傳導特性為Poole Frenkel emission所主導。在低電場作用下時，由於薄膜的結晶化，結晶顆粒的邊界將導致大量的漏電流，因此其傳導特性在此時並不明顯。
此外又將低壓化學氣相沈積所得的氧化鉭薄膜放置在溫度為400度的一氧化二氮高密度電漿(HDPN2O)中進行熱處理，以得到品質更好的薄膜。低溫電漿熱處理主要是可以有效減少晶片的受熱量。結果發現在一氧化二氮高密度電漿中進行熱處理後，其漏電流的改善與增強TDDB (time-dependent dielectric breakdown)特性要比以傳統的氧氣低密度電漿(PO2)或氧氣高密度電漿(HDPO2)熱處理後的結果要好。此外經過低溫高密度電漿熱處理後，並不太會使得在二氧化矽與矽基板界面處的界面過渡層變得更厚。對於電漿熱處理後的氧化鉭薄膜，在低電場作用下時，其電流傳導是由Schottky emission所主導。而在高電場作用下，其電傳導特性則是由Poole-Frenkel emission所主導。

In this thesis two dielectric materials, silicon dioxide SiO2 and tantalum pentoxide Ta2O5, were investigated. In the development of the integrated circuit, the MOS device plays a very important role. The silicon dioxide SiO2 is used to act as its insulator layer. When the device dimension is scaled down, the thickness of the insulator layer is also reduced. Owing to the scaling of the oxide thickness, the increase of the oxide leakage current is inevitable. For minimizing the gate leakage current, many new technologies are recommended to grow high quality thin oxide film.
The rapid thermal processing (RTP) system using in-situ steam generation (ISSG) was employed to grown thin gate oxides in this thesis. Experimental results indicate that oxides grown by diluted steam rapid thermal oxidation exhibit significant reduction in gate leakage current, increase in breakdown field, and device reliability, as compared to conventional furnace-grown wet oxides. Furthermore, ISSG oxides showed better electric characteristics than dry RTO oxides. And the post-annealing effects of ISSG oxide in N2 and nitric oxide (NO) ambient were also examined. It was found that the sample with post-annealing in NO ambient shows less charge trapping, higher charge-to-breakdown, higher electron mobility and smaller device degradation under channel hot carrier stress. This is attributed to the improvement of structural transition layer by the incorporation of nitrogen near and at Si/SiO2 interface during NO annealing.
In addition to the quality improvement of the silicon dioxide, the high dielectric constant material has also been considered to substitute for the silicon dioxide to act as the gate dielectric. In this thesis tantalum pentoxide Ta2O5 was researched due to its high dielectric constant of about 25, good step coverage, and good dielectric strength. Tantalum pentoxide (Ta2O5) thin film with an initial thickness of 10.5 nm was deposited onto p-type silicon substrate by low-pressure chemical vapor deposition (LPCVD), and subsequently annealed in O2 ambient at 500 oC to 800 oC for 30 minutes for improving its electrical characteristics. It was found that the leakage current of the Ta2O5/SiOx capacitor was controlled by the Ta2O5 layer when the annealing temperature was lower than 700 oC. On the other hand, the leakage current was controlled by the interfacial oxide layer (SiOx) when the annealing temperature was higher than 700 oC. Furthermore, higher annealing temperatures will result in a rougher sample surface and a higher leakage current due to Ta2O5 crystallization. For the as-deposited Ta2O5 films, in low electric field region, the leakage current could be dominated either the hopping conduction or Poole-Frenkel emission. Or both of the two conduction mechanisms exist in the leakage current conduction. In high electric field Fowler-Nordheim tunneling was the main leakage mechanism. After the crystallization of the Ta2O5 film, the conduction mechanism in high electric field was dominated by the Poole Frenkel emission. But at low electric field the conduction mechanism was not obvious. It could be affected by the formation of the grain boundary in the Ta2O5 film.
And highly reliable ultrathin low-pressure chemical vapor deposited (LPCVD) tantalum pentoxide (Ta2O5) capacitors were fabricated by using high-density plasma (HDP) annealing in N2O at 400 oC after the film deposition. The low temperature plasma annealing was used for minimizing the thermal budget. It was found that HDP annealing in N2O could significantly reduce the leakage current of Ta2O5 capacitors so as to produce better time-dependent dielectric breakdown characteristics than either conventional oxygen-plasma annealing or HDP annealing in O2. It was also found that HDP annealing in N2O would not significantly increase the thickness of interfacial SiOx layer between Ta2O5 and the underlying silicon substrate. The leakage current mechanism was also investigated. For the HDP N2O annealed Ta2O5 films, it was found that the main leakage mechanism was Schottky emission in low electric field and Poole-Frenkel emission in high electric field.

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