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研究生: 李貞慶
Lee, Jen-ching
論文名稱: 以類比積體電路實現太陽能最大發電功率追蹤器
Analog Integrated Circuit Realization for Maximum Power Point Tracking of Solar Energy Systems
指導教授: 郭永超
Kuo, Yeong-chau
郭泰豪
Kuo, Tai-haur
學位類別: 碩士
Master
系所名稱: 電機資訊學院 - 電機工程學系
Department of Electrical Engineering
論文出版年: 2010
畢業學年度: 98
語文別: 英文
論文頁數: 89
中文關鍵詞: 太陽能最大功率追蹤積體電路
外文關鍵詞: Photovoltaic, Integrated circuit, Maximum power point tracking
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  • 本論文研發適用於太陽能發電系統之最大功率追蹤轉換器晶片,有別於傳統微處理器結合離散元件的實現方式,針對太陽能發電系統最大功率追蹤轉換器之積體電路化提出新方法,使用精簡類比式電路設計控制結合低複雜度的最大功率追蹤演算法運作即可同時達成高追蹤效率及快速暫態響應的效能,不需要另外增加演算法複雜度、硬體成本及運算量。本篇論文提出一項最適合等效負載線斜率技術,可依實際的太陽能電池輸出特性曲線去決定最適合等效負載線和斜率,因此能與實際應用環境做可適應性的改變。並設計具有高電壓及低電壓兩種模式的結合,適用於太陽能電壓範圍0V~500V,輸出電流0~4A的應用,打破低電壓半導體晶片使用的限制,未來可將此技術移植至超高電壓半導體晶片中。
    此類比式最大功率追蹤轉換器是使用台灣積體電路製造股份有限公司所提供的0.35um 2P4M 3.3V/5V混合訊號互補式金氧半製程來製造。全晶片面積大約1.72x1.79mm2,遠小於傳統以微處理器方法實現的面積。實際量測結果,追蹤效率高達99.3%以上,其暫態響應參數(暫態追蹤係數)為0.47ms/W,遠優於現有技術,此轉換器的最大效率為91%。由量測結果與現有技術比較,本論文研製出目前世界上最小面積成本且最佳效能之太陽能最大功率追蹤轉換器。

    The research and invention of a maximum power point tracking converter on chip for solar photovoltaic system is presented in this thesis. It is different from the conventional style which a microprocessor and discrete devices are employed to implement the function. A novel solution is proposed for the integrated circuits of the photovoltaic maximum power point tracking converter. The combination of the analog circuit design and low complex maximum power point tracking algorithm could achieve high tracking efficiency and fast transient response simultaneously without imposing additional algorithm complexity, hardware cost, and major computational load. Adaptive load line slope technique is proposed in this thesis. Under the suggested method, the adaptive load line slope is decided by the output characteristic curves of the real photovoltaic cells, and it will be optimal for the real applications. The design with the hybrid of high voltage mode and low voltage mode is adaptive for the output voltage rating 0~500V of photovoltaic array, and the output current rating 0~4A of the photovoltaic array. The limit of the applicative range on the low voltage CMOS chip is broken by the above method. In the future, these techniques will be transferred onto the ultra high voltage CMOS chip.
    This analog maximum power point converter fabricated with TSMC 0.35um 2P4M 3.3V/5V Mixed Signal CMOS process. The total chip area is about 1.72x1.79 mm2, which is smaller than that in the conventional types. The measured tracking efficiency is 99.3%, the parameter of transient response (Transient Tracking Factor) is 0.47ms/W, being the best in the world, and the power conversion efficiency is 91%. From the comparison between the measurement results and that of other techniques, this thesis presents a photovoltaic maximum power point tracking converter with the smallest area, the lowest cost, and the best performance in the world.

    Abstract (Chinese) I Abstract (English) II Acknowledgment III Table of Contents IV List of Tables VI List of Figures VII Chapter 1 Introduction …………………………………………………………… .1 1.1 Motivation …..……………………………………………………………………..2 1.2 Organization ………………………………………………………………………...4 Chapter 2 Fundamentals of Photovoltaic Maximum Power Point Tracking ….5 2.1 Fundamentals of Photovoltaic Cell ……………………………………………. 5 2.1.1 Typical Photovoltaic Cell Characteristic ……………………………………. 5 2.1.2 Photovoltaic Cell Model ……………………………………………………. .6 2.2 Summary of Maximum Power Point Tracking Techniques ………………………. 8 2.2.1 Perturbation and Observation (P&O) Method ……………………………….9 2.2.2 Incremental Conductance (INC) Method …………………………………..11 2.2.3 Miscellaneous Methods ……………………………………………………..13 2.3 Specifications of Photovoltaic Maximum Power Point Tracking Converter …… 15 2.3.1 Tracking Efficiency ………………………………………………………..15 2.3.2 Transient Response …………………………………………………………15 2.3.3 Power Conversion Efficiency ………………………………………………17 2.4 Topology of Photovoltaic Interface for Maximum Power Point Tracking ………... 17 2.4.1 Buck Converter Topology …………………………………………………..18 2.4.2 Boost Converter Topology ………………………………………………….20 Chapter 3 Techniques of CMOS Photovoltaic MPPT Converter …………22 3.1 Techniques for Breaking the Trade-Off of Conventional MPPT ………………... 22 3.1.1 Issues Statement …………………………………………………………… 22 3.1.2 Adaptive Load Line Slope Technique ……………………………………….. 27 3.1.3 Strategy of Transient-State Detecting and Variable Frequency Control ……..29 3.2 Wide Power Rating Range MPPT Converter ……………………………………...31 3.2.1 Low Voltage Mode Structure …………………………………………………31 3.2.2 High Voltage Mode Structure ………………………………………………... 32 Chapter 4 Circuit Design …………………………………………………………34 4.1 Architecture of Monolithic MPPT Converter ………………………………………34 4.2 Power Transistors of Buck Power Stage ……………………………………………35 4.2.1 Distributed and Weighted Conduction ………………………………………..36 4.3 Current Sensor and On Chip Blocking Diode ………………………………………38 4.4 MPPT Algorithm Circuits …………………………………………………………..41 4.4.1 Analog Multiplier ……………………………………………………………...42 4.4.2 Sample and Hold (S/H) Circuit and Comparator ……………………………...44 4.4.3 Up/Down Counter ……………………………………………………………..46 4.4.4 Resistor String DAC …………………………………………………………..47 4.5 Proposed Current-Mode Control Circuits ………………………………………….49 4.5.1 Adaptive Load Line Slope Control Circuit ……………………………………49 4.5.2 Ramp and Clock Generator ……………………………………………………52 4.5.3 Dead-Time Control Driver …………………………………………………….53 4.6 Transient/Steady Condition Detector ……………………………………………….54 4.7 Operational Amplifier ………………………………………………………………59 4.8 Comparator ………………………………………………………………………….62 4.9 Layout Consideration ………………………………………………… …………….64 Chapter 5 Simulation and Measurement Results ……………………………….. .66 5.1 Simulation Results ………………………………………………………………….66 5.2 Measurement Setup …………………………………………………………………76 5.3 Comparison …………………………………………………………………………78 5.4 Measurement Results………………………………………………………………..80 Chapter 6 Conclusion ……………………………………………………………..85 Reference ………………………………………………………………………………86

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