本論文研究可分為二部分。為針對60-GHz非接觸式呼吸心跳感測系統的規格要求，第一部分整合了一個操作在毫米波頻段之V-band壓控振盪器及一個可以完全涵蓋該V-band振盪器的振盪頻率並正確除頻之Ka-band直接注入式鎖定除頻器除2電路。V-band壓控振盪器採用了電抗轉換的方式來實現，使元件可以在毫米波擁有較佳的特性，進而提升壓控振盪器的效能；由於系統規格，除二的直接注入式鎖定除頻器必須提供大的鎖定範圍及輸出功率，本論文在元件特性的選擇上有不同於傳統的方法以達到上述需求。此整合電路是以TSMC 90-nm GUTM 1P9M CMOS製程所完成。在實際電路量測時，壓控振盪器核心電壓為0.8 V及注入式鎖定除頻器核心電壓為0.6 V的操作時，壓控振盪器輸出的振盪頻率可調範圍為59.42~60.16 GHz、相位雜訊在頻率相移1 MHz時為-89.02~-90.69 dBc/Hz、輸出功率為-6.8~-6.4 dBm；除頻器在鎖定電壓為2.1 V的鎖定狀態下，相位雜訊為-95.00~-96.55 dBc/Hz、輸出功率為-1.2~0.5 dBm。整體晶片消耗面積為1.1"×" 0.8 mm2，消耗功率為62.22 mW。
第二部分是將第一部分以另外一種方法來實現60-GHz毫米波振盪源。由於在直接實現毫米波頻段壓控振盪器，它的效能普遍而言並不理想，我們透過決定先實現一個30-GHz的壓控振盪器並整合為一個鎖相迴路，未來再藉由乘二電路整合為60-GHz毫米波振盪源。鎖相迴路在毫米波頻段常因除頻迴路沒有正確除頻而無法鎖定的情況，本論文提出了一新型寬頻注入式鎖定除頻器除3電路注入式鎖定除頻振盪器來完成一個鎖相迴路，透過此新型寬頻除3注入式鎖定除頻器，。可以解決鎖相迴路在毫米波頻段常因除頻迴路無法正確除數而無法鎖定情況。由模擬結果得知此電路在核心電壓1.0 V及0.5 V時，壓控振盪器的振盪頻率可調範圍為29.4~32.2 GHz，相位雜訊在頻率相移1 MHz時為-93.5~-96.5 dBc/Hz，輸出功率為-4~-6 dBm，寬頻除三在注入訊號強度為0 dBm時，鎖定頻率為28.4~33.2 GHz(4.8 GHz)，鎖相迴路的輸出頻率為30 GHz，輸出功率為-4.5 dBm，參考頻率突波為-54 dBm。整體晶片面積為0.9"×" 0.8 mm2，消耗功率為33.92 mW。
附錄為整合了24-GHz人體呼吸心跳生理訊號感測之整合系統，採用了利用自我注入鎖定技術的方式來實現。此系統經過了數學模型的推導，我們可以發現此系統當輸入訊號的頻率越低時，會有更佳的訊號雜訊比增益，非常有利於偵測人體呼吸心跳的微弱跳動。本系統使用了相位延遲達成的自我注入式鎖定振盪器及作為時間延遲差的注入式鎖定振盪器來完成系統的設計，除了在接收端整合了進行相位解調變的混頻器之外，也在輸出端整合了類循環器以實現單天線系統。

This thesis are divided into two major parts: the first part is to integrate a V-band Voltage Controlled Oscillator (VCO) and a Ka-band Injection-Locked Frequency Divider (ILFD) which have enough locking range to lock all the VCO tuning range and divide the VCO frequency by two, based on the request of a 60-GHz CMOS noncontact human Vital-Signs Sensing system.
The second part proposes a method different from the first part to fulfill the dual-mode frequency outputs in an effective way. Because the VCO performance is easily degraded in mm-wave regime, we implement a Ka-band VCO in advance and then use a proposed new wide locking range divide-by-three ILFD circuit to achieve a Phase Locked Loop (PLL). By this divide-by-three ILFD, we have solved some problem of mm-wave PLL which may fail in dividing the VCO’s frequency correctly.
The appendix describes a 24-GHz CMOS Human Vital-sign Bio-Sensor design. It adopts a Self-Injection-locked Oscillator (SILO) to realize the sensor function. This system includes a SILO which uses the phase delay scheme and a quasi-circulator (QC) which is connected to the antenna in the transmitter path.

C.-R. Anderson and T.-S. Rappaport, "In-building wideband partition loss measurements at 2.5 and 60 GHz," IEEE Transactions on, Wireless Communications, vol. 3, p.p. 922-928, 2004.
K.-M. Chen, D. Misra, H. Wang, H.-R. Chuang, and E. Postow, “An X-band microwave life-detection system,” IEEE Trans. Biomed. Eng., vol. BME-33, pp. 697-702, July. 1986.
K.-M. Chen, Y. Huang, J. Zhang, and A. Norman, “Microwave life-detection systems for searching human subjects under earthquake rubble and behind barrier,” IEEE Trans. Biomed. Eng., vol. 27, no. 1, pp. 105-114, Jan. 2000.
C. Li and J. Lin, “Optimal carrier frequency of non-contact vital sign detectors,” in Proc. IEEE Radio Wireless Symp., p.p.281-284, Jan. 2007.
H. Chuang, H. Kuo, F. Lin, T. Huang, C. Kuo, and Y. Ou, “60-GHz millimeter-wave life detection system (MLDS) for noncontact human vital-signal monitoring,” IEEE Sensors J., vol. 12, no. 3, p.p. 602-609, Mar. 2012.
R. Adler, “A study of locking phenomena in oscillators,” Proc. IRE, vol. 34, no. 6, p,p. 351-357, June. 1946.
F.-K. Wang, C.-J. Li, C.-H. Hsiao, T.-S. Horng, J. Lin, K.-C. Peng, J.-K. Jau, J.-Y. Li and C.-C. Chung “A Novel Vital-Sign Sensor Based in a Self-Injection-Locked Oscillator,” IEEE Trans. Microw. Theory Tech, vol. 58, no. 12, p.p. 4112-4120, Dec. 2010.
B. Razavi, RF Microelectronics, 2nd edition, Prentice Hall, 2012.
B. Razavi, Design of Analog CMOS Integrated Circuit, McGraw-Hill, 1996.

W.-S. Tak Yan and H.-C. Luong, “A 900-MHz CMOS Low-Phase-Noise Voltage Controlled Ring Oscillator,” IEEE Trans. Circuits and Systems II: Analog and Digital Signal processing, vol. 48, no. 5, p.p. 216-221, May. 2001.
葉詩涵, “應用於MB-OFDM UWB 頻率合成器之鎖相迴路設計,” 碩士論文, 電機工程學系, 國立成功大學, 台南市, 2010.
X. Li, S. Shekhar, D. J. Allstot, “"G" _"m" -boosted Common-gate LNA and Differential Colpitts VCO/QVCO in 0.18-um CMOS,” IEEE J. Solid-State Circuits, vol. 40, no. 12, p.p. 2609-2619, Dec. 2005.
D. B. Leeson, “A simple model of feedback oscillator noise spectrum,” Proc. IEEE, p.p. 329-330, Feb. 1966.
E. Hegazi, H. Sjoland, and A.-A. Abidi, “A filtering technique to lower LC oscillator phase noise,” IEEE J. Solid-State Circuits, vol. 36, no. 12, p.p. 1921-1930, Dec. 2001.
J.-S. Lyang, C.-H, Mei, H.-J. Cheng, L.-C.Feng, and J.-Y, Da, “A 5GHz Low Phase Noise Hartley Quadrature CMOS VCO,” in IEEE conference on Electron Devices and Solid-State Circuits(EDSSC),2007. p.p. 961-964.
P. Andreani and H. Sjoland, “Tail current noise suppression in RF CMOS VCOs,” IEEE J. Solid-State Circuits, vol. 37, no. 12, p.p. 342-348, May. 2002.
S. Verma, H.-R. Rategh, and T.-H. Lee, “A unified model for injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 38, no. 6, p.p. 1015-1027, May. 2003.
A. Mirzaei, M.-E. Heidari and A.-A. Abidi, “Analysis of Oscillators Locked by Large Injection Signals: Generalized Adler’s Equation and Geometrical Interpretation,” in IEEE Custom Integrated Circuits Conference, San Jose, CA, Sept. 2006, p.p. 737-740.
A. Mazzanti, P. Uggetti, and F. Svelto, “Analysis and Design of Injection-Locked LC Dividers for Quadrature Generation,” IEEE J. Solid-State Circuits, vol. 39, no. 9, p.p. 1425-1433, Sep. 2004.
C.-Y. Wu and C.-Y. Yu, “Design and Analysis of a Millimeter-Wave Direct Injection-Locked Frequency Divider With Large Frequency Locking Range,” IEEE Trans. Microw. Theory Tech, vol. 55, no. 8, p.p. 1649-1658, Aug. 2007.
W. Hui and A. Hajimiri,” A 19 GHz 0.5 mW 0.35 μm CMOS frequency divider with shunt-peaking locking-range enhancement,” in IEEE Solid-State Circuits Conference, ISSCC 2001. Dig. of Technical Papers, San Francisco, CA, Feb. 2001, p.p. 412~413.
H.-R. Rategh and T.-H. Lee, “Superharmonic injection-locked frequency dividers,” IEEE J. Solid-State Circuits, vol. 34, no. 6, p.p. 813-821, June. 1999.
J.-C. Chien and L.-H. Lu,” 40GHz Wide-Locking-Range Regenerative Frequency Divider and Low-Phase-Noise Balanced VCO in 0.18μm CMOS,” in IEEE Solid-State Circuits Conference, ISSCC 2007. Dig. of Technical Papers, San Francisco, CA, Feb. 2007, p.p. 544~621.
C.-C Chen, H.-W. Tsao and H. Wang, “Design and Analysis of CMOS Frequency Dividers With Wide Input Locking Ranges,” IEEE Trans. Microw. Theory Tech, vol. 57, no. 12, p.p. 3060-3069, Dec. 2009.
Y.-T. Chen, M.-W. Li, T.-H. Huang and H.-R. Chuang, “A V-Band CMOS Direct Injection-Locked Frequency Divider Using Forward Body Bias Technology,” IEEE Microwave and Wireless Components Letters, vol. 20, no. 7, p.p. 396-398, July. 2010.
H.-H. Hsieh, Y.-H. Chen and L.-H. Lu, “A Millimeter-Wave CMOS LC-Tank VCO With an Admittance-Transforming Technique,” IEEE Trans. Microw. Theory Tech, vol. 55, no. 9, p.p. 1854-1861, Sept. 2007.
謝昆展, “整合除5除頻器之60GHz鎖相迴路設計,” 碩士論文, 電機工程學系, 國立成功大學, 台南市, 2012.
B.-Y. Lin and S.-I. Liu, “Analysis and Design of D-Band Injection-Locked Frequency Dividers,” IEEE J. Solid-State Circuits, vol. 46, no. 6, p.p. 1250-1264, June. 2011.
K.-H. Tsai and S.-I, Liu, “A 43.7mW 96GHz PLL in 65nm CMOS,” in IEEE Solid-State Circuits Conference, ISSCC 2009. Dig. of Technical Papers, San Francisco, CA, Feb. 2009, p.p. 276-277.
S.-K. Reynolds, B.-A. Floyd, U.-R. Pfeiffer, T. Beukema, J. Grzyb, C. Haymes, B. Gaucher and M. Soyuer, “A Silicon 60-GHz Receiver and Transmitter Chipset for Broadband Communications,” IEEE J. Solid-State Circuits, vol. 41, no. 12, p.p. 2820-2831, Dec. 2006.
B.-A. Floyd, “A 16–18.8-GHz Sub-Integer-N Frequency Synthesizer for 60-GHz Transceivers,” IEEE J. Solid-State Circuits, vol. 43, no. 5, p.p. 1076-1086, May. 2008.
M.-C. Chen and C.-Y. Wu, “Design and Analysis of CMOS Subharmonic Injection-Locked Frequency Triplers,” IEEE Trans. Microw. Theory Tech, vol. 56, no.89, p.p. 1869-1878, Aug. 2008.
Prof. M. H. Perrott, Lecture Notes, Dept. of EECS , MIT. Avalaible: http://cppsim.org
/PLL_Lectures/
高曜煌, 射頻鎖相迴路IC設計, 滄海書局, 2005.
許民傑, “1.8GHz DCS-1800 金氧半射頻頻率合成器的設計,” 碩士論文, 電信研究所, 國立交通大學, 新竹市, 2002.
S. Yuan, S. Liter, and S. Pengyu, “Design of a High Performance Charge Pump Circuit for Low Voltage Phase-locked Loops,” in International Symposium on 2007, Integrated Circuits, 2007. ISIC '07, p.p. 271-274.
H. Changhong, W. Xiushan, and W. Dan, “A charge-pump circuit to restrain reference spurs in the PLL,” in IEEE 9th International Conference on ASIC (ASICON), 2011, pp. 1010-1013.
T.-N. Luo and Y.-J. Emery, “A 0.8-mW 55-GHz Dual-Injection-Locked CMOS Frequency Divider,” IEEE Trans. Microw. Theory Tech, vol. 56,no.3, p.p. 620-625, Mar. 2008.
H. Wu and L. Zhang, “A 16-to-18GHz 0.18μm Epi-CMOS Divide-by-3 Injection-Locked Frequency Divider,” in IEEE Solid-State Circuits Conference, ISSCC 2006. Dig. of Technical Papers, San Francisco, CA, Feb. 2006, p.p. 2482 – 2491.
H.-H. Hsieh, H.-S. Chen and L.-H. Lu, “A V-Band Divide-by-4 Direct Injection-Locked Frequency Divider in 0.18μm CMOS,” IEEE Trans. Microw. Theory Tech, vol. 59, no.2, p.p. 620-625, Feb. 2011.
P.-K. Tsai, T.-H. Huang and Y.-H. Pang, “CMOS 40 GHz divide-by-5 injection-locked frequency divider,” Electron. Lett., vol.46, no.14, pp. 1003-1004, July, 2010.
P.-K. Tsai, C.-C. Liu and T.-H. Huang, “Wideband Injection-Locked Divide-by-3 Frequency Divider Design with Regenerative Second-Harmonic Feedback Technique,” in Microwave Conference, 2012. EuMC 2012. European, 2012, pp. 293-296.
Y.-T. Chen, M.-W. Li, H.-C. Kuo, T.-H. Huang and H.-R. Chuang, “Low-Voltage K-Band Divide-by-3 Injection-Locked Frequency Divider With Floating-Source Differential Injector,” IEEE Trans. Microw. Theory Tech, vol. 60, no.1, p.p. 60-67, Jan. 2012.
I.-T. Lee, C.-H. Wang and S.-I. Liu, “3.6mW D-band Divide-by-3 Injection-Locked Frequency Dividers in 65nm CMOS,” in Solid-State Circuits Conference, 2011. ASSCC '11. IEEE Asian, 2011, p.p. 93-96.
劉深淵, 楊清淵, “鎖相迴路,＂滄海書局, 2006.
S.-W. Chu and C.-K. Wang, “An 80 GHz Wide Tuning Range Push-Push VCO With gm_-Boosted Full-Wave Rectification Technique in 90 nm CMOS,” IEEE Microwave and Wireless Components Letters, vol. 22, no. 4, p.p. 396-398, Apr. 2012.
P.-C. Huang, M.-D. Tsai, G.-D. Vendelin, H. Wang, C.-H. Hung and C.-S. Chang, “A Low-Power 114-GHz Push–Push CMOS VCO Using LC Source Degeneration,” IEEE J. Solid-State Circuits, vol. 42, no. 6, p.p. 1230-1239, Jun, 2007.
K.-W. Cheng and D.-J. Allstot, “A Gate-Modulated CMOS LC Quadrature VCO,” in IEEE, Radio Frequency Integrated Circuits Symposium, 2009. RFIC 2009, p.p. 267-270.
K.-W. Cheng, K. Natarajan and D.-J. Allstot, “A Current Reuse Quadrature GPS Receiver in 0.13μm CMOS,” IEEE J. Solid-State Circuits, vol. 45, no. 3, p.p. 510-523, Mar. 2010.
A. Musa, R. Murakami, R. Sato, W. Chaivipas, K. Okada and A. Matsuzawa, “A Low Phase Noise Quadrature Injection Locked Frequency Synthesizer for MM-Wave Applications,” IEEE J. Solid-State Circuits, vol. 46, no. 11, p.p. 2635-2649, Nov. 2011.
J. Lee and H. Wang, “Study of Subharmonically Injection-Locked PLLs,” IEEE J. Solid-State Circuits, vol. 44, no. 5, p.p. 1539-1553, May, 2009.
C.-Yu Wu, M.-C. Chen and Y.-K Lo, “A Phase-Locked Loop With Injection-Locked Frequency Multiplier in 0.18-μm CMOS for V -Band Applications,” IEEE Trans. Microw. Theory Tech, vol. 57,no.7, p.p. 1629-1636, July. 2009.
C. Lam and B. Razavi, “A 2.6-GHz/5.2-GHz frequency synthesizer in 0.4-μm CMOS technology,” IEEE J. Solid-State Circuits, vol. 35, no. 5, p.p. 788-794, May 2000.
J. Alvarez, H. Sanchez, and G. Gerosa, “A wide-band low-voltage PLL for PowerPC microprocessors,” IEEE J. Solid-State Circuits, vol. 30, no. 4, p.p. 383-391, Apr. 1995.
T.-N. Luo, S.-Y. Bai and Y.-J.-E. Chen, “A 60-GHz 0.13-um CMOS Divide-by-Three Frequency Divider,” IEEE Trans. Microw. Theory Tech, vol. 56, no.11, p.p. 2409-2415, Nov. 2008.
ANSYS HFSS .Avalaible:http://www.ansys.com/Products/Simulation+Technology
/Electronics/Signal+Integrity/ANSYS+HFSS
Prof. K.-W. Cheng, /Lecture Note/
Department of Electrical & Computer Engineering, the university of Utah. Avalaible:
http://www.ece.utah.edu/~harrison/ece5720/Common_Centroid.pdf
E. Laskin, M. Khanpour, S. T. Nicolson, A. Tomkins, P. Garcia, A. Cathelin, D. Belot, and S. P. Voinigescu, “Nanoscale CMOS transceiver design in the 90–170 GHz range,” IEEE Trans. Microw. Theory Tech., vol. 57, no. 12, pp. 3477–3490, Dec. 2009.
S. Kim and C. Nguyen, “On the development of a multifunction millimeter-wave sensor for displacement sensing and low-velocity measurement,” IEEE Trans. Microw. Theory Tech., vol. 52, no. 52, pp. 2503–2512, Nov. 2004.
Y. Yan, L. Cattafesta,C. Li, and J. Lin, “Analysis of detectionmethods and realization of a real-time monitoring RF vibrometer,” IEEE Trans. Microw. Theory Tech., vol. 59, no. 12, pp. 3556–3566, Dec 2011.