GALS系統經常將一個資料流分開成許多較小的功能單元來減少資料在交互傳輸上產生的問題，它使用於大部分的傳送和信號處理的系，因此需要資料緩衝區(buffer) 來溝通兩個不同操作頻率與資料吞吐量的功能單元，再者由於為了迎合各戶的要求在晶片中整合多個標準設計越來越重要，不同的資料樣本經常存在於各種的標準，然而當改變資料樣本的個數和需求將會使的緩衝區的手動撰寫變得複雜。
在本篇論文我們提出在多種的有限資料樣本和混合時域下緩衝區最佳化的方法，被稱為次緩衝區的叢集，此方法採用圖形著色與次緩衝區切割策略，而設計出的緩衝區在RTL程式的硬體架構不僅包含雙埠SRAM也包含單一埠SRAM，我們的方法有效率的分享資料儲存的緩衝區來找出一個最小的緩衝區。根據實際實驗結果顯示，比較於沒有做最佳化的緩衝區，我們所提出的方法，可以節省59%~80%左右緩衝區的面積

The GALS approach usually divides a data-flow in the most communication and signal processing systems into numerous smaller enough function units to reduce interconnection problems. Buffers are commonly used in the GALS approach to handle the two function units running with different operating frequencies and throughput requirements. Furthermore, integrating various standards in a chip is increasingly important for meeting versatile consumers’ demands. Multiple data patterns usually exist for various standards. However, the design of buffers capability of handing varying number of data patterns and requirements becomes increasingly complex.
This work presents a buffer optimization approach capability of dealing with multiple finite data patterns in mixed clock domains, referred to as sub-buffer clustering (SB-Clustering). SB-Clustering adopts a graph coloring first followed by a line partitioning approaches. The buffer thus designed is consisted of not only dual-port SRAM but also single port SRAM at register-transfer level (RTL). Our approach shares the buffers of data patterns effectively and leads to a buffer with smaller memory. Experimental results using realistic test cases show that the proposed method can save the buffer area of the buffer architecture from 59% to 80% when compared with the design without optimization.

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