本論文係以CMOS製程研製無線心電圖通信晶片，為了要容易整合成單一晶片，我們不採用現有可用的通訊技術(無線網路以及藍芽技術)，而是採用自行設計的無線通訊系統，規格如下：操作頻率：2.4GHz-2.4835GHz ISM band、傳輸距離：10-15公尺、頻道數：40、調變方式：FSK，採用二次升頻發射機架構和超外差式接收機架構，中頻頻率為320MHz-400MHz。
　　依據我們所訂出的電路規格，以TSMC 0.25μm 1P5M CMOS製程製作射頻發射機(PA、MIXER、VCO)以及射頻接收機(LNA、MIXER、VCO)，射頻發射機經量測其增益約為12dB，最大輸出功率可達0dBm；射頻接收機電路模擬雜訊指數約為3.849dB，增益為16dB，輸入1dB壓縮點約在-27dBm。
　　若能繼續整合其他電路實現無線通信晶片於單一晶片，相信對於醫療方面技術將有一定的貢獻。

　　The thesis presents the design and implementation of wireless ECG communication chip in CMOS process. In order to integrate the system in a chip easily, we don’t adopt any present wireless communication model, such as Bluetooth and WLAN. Otherwise, we adopt a simple wireless communication system designed by ourselves. The specifications of our designed system are: Operating frequency: ISM band 2.4GHz-2.4835GHz, Transmition distance: 10m-15m, Channel number: 40, and Modulation type: FSK. We adopt two-step transmitter and super-heterodyne receiver structure and the immediate frequency is 320MHz-400MHz.
　　According to the specifications of circuit designed by us, we design and implement the RF transmitter (PA/MIXER/VCO) and RF receiver (LNA/MIXER/VCO) in TSMC 0.25μm CMOS process. With measurement, the RF transmitter exhibits a conversion gain of 12dB and the maximum power out of it can achieve 0dBm. The specifications of RF receiver we simulated are noise figure of 3.849dB, conversion gain of 16dB, and input P1dB of –27dBm.
　　If we can integrate other circuits in a chip to implement wireless ECG communication chip, our chip will provide contribution to the technology of medicine.

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[20] 邱永明，應用於2.4及5.7GHz802.11WLAN之CMOS單晶射頻積體電路，國立成功大學電機工程研究所碩士論文，民國九十二年。

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