現在的系統晶片(SoC)內部的通訊最主要使用匯流排，但是隨著半導體製程的進步，單一晶片內可以擺放的元件愈來愈多，使得晶片變得愈來愈複雜，因此匯流排上的寄生效應、訊號同步與匯流排的頻寬問題也漸漸成為晶片效能的瓶頸之一，為了解決這個問題，有人提出使用晶片網路的方式來取代匯流排。
本篇論文將針對晶片內部網路繞送機制的相關議題做探討，從交換器的拓樸、資料傳送路徑到交換技術與網路介面都會做介紹，並且會實作樹狀拓樸的交換器，封包會以蟲洞交換(Wormhole Switching)與虛擬通道(Virtual Channel)在交換器做傳送以節省成本與增加網路效能，最後會將我們所實作的電路在FPGA做實際的驗證。我們所實作的電路在TSMC 0.13 μm 製程下，可以到達100MHz 的運作速度。

The most popular on-chip communication method of System on Chip is system bus. As the advance of semiconductor industry and process technology, a couple of larger systems can be integrated on a single chip, making the chip more and more complicate. The problem of parasitic resistance, parasitic capacitance, signal synchronization and bandwidth of bus become the bottleneck of the performance of chip. In order to solve this kind of problems, some research use the network to replace the on chip bus, which is called Network on Chip (NoC).
In this thesis, we will discuss the issue of network on chip, including topology of switch, routing algorithm, switching technology and network interface (NI). We also implement a switch with tree topology, wormhole switching and virtual channel to save area of chip and increase the performance of network. In the end of this thesis we show our result of verifying our design in FPGA. And our design can operate at 100MHz in TSMC 0.13μm technology.

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