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研究生：	陳柏任 Chen, Po-Jen
論文名稱：	碳化矽蕭基二極體之邊緣終端區結構崩潰電壓特性模擬 Simulation of Breakdown Voltage Characteristics of 4H-SiC Schottky Barrier Diode with Edge Termination Structure
指導教授：	李文熙 Lee, Wen-Hsi
學位類別：	碩士 Master
系所名稱：	電機資訊學院 - 電機工程學系 Department of Electrical Engineering
論文出版年：	2015
畢業學年度：	103
語文別：	英文
論文頁數：	73
中文關鍵詞：	碳化矽蕭基二極體、功率元件、終端邊緣結構設計
外文關鍵詞：	Silicon-Carbide Schottky barrier diode (SiC-SBD), Power device, Edge termination structure
相關次數：	點閱：126 下載：3
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相較於技術穩定的矽晶圓，碳化矽(SiC)材料應用在高功率元件，有著更好的特性，例如:寬能矽、高崩潰電場、高熱傳導係數等特性，隨著綠色能源科技的提倡，碳化矽功率元件被賦予極高的評價，而成本及技術較低的二極體，是最先被研發且量產的碳化矽功率元件，其中又以單極性的蕭基二極體(Schottky barrier diode - SBD)應用最廣。
許多研究團隊，在實現其高耐壓及低導通電阻的特性上做設計，而本論文注重在邊緣結構終端區結構的設計，來減少金屬半導體接面邊緣的電場擁擠的現象，以提高元件的崩潰電壓，或減低導通電阻。
我們利用元件模擬軟體(Synopsys Sentaurus TCAD)來輔助設計高耐壓及低導通電阻的碳化矽蕭基二極體元件，利用改變磊晶層的濃度、主動區的長度以及保護層的厚度，來設計使用場板邊緣結構的碳化矽蕭基二極體；同時合併場板和保護環的邊緣結構，設計不同的磊晶層濃度、主動區寬度及場板延伸長度，使元件能有最佳的特性。
在研究中發現，對於崩潰電壓的影響，保護層厚度及場板延伸的長度有最佳值(保護層厚度0.4um、場板延伸長度12um，在磊晶層濃度為6e15cm-3時，崩潰電壓可達1135V)，而本研究中也發現，相較於只有場板結構，合併場板及保護環的結構可以提升約3~5%的崩潰電壓。

Silicon-Carbide (SiC) has many superior material properties in power device applications against mature manufacturing Silicon wafer. For example, SiC has wide bandgap, high breakdown field, high thermal conductivity and so on. With the promotion of the green technology for saving energy, SiC power devices were given a high rating. The first to be developed and mass-produced SiC power devices are diodes which need lower technique and cost. Among them, the unipolar Schottky barrier diodes (SBDs) have widest application.
Many research teams have been designed and implemented the device with high breakdown voltage and low conduction resistance. In this paper, we focus on designing the edge termination structure to reduce the field crowding phenomenon around the edge of the metal-semiconductor junction and improve the breakdown voltage or reduce the conduction resistance of the device.
We use the simulation software (Synopsys Sentaurus TCAD) to design the high voltage and low resistance SiC-SBD. First, we change the epitaxy layer concentration, active region length and passivation thickness with field plate structure. Then we combine the field plate and field ring edge termination structure in different epitaxy layer concentration, active region length and field plate extended length to reach the best performance with the optimal value of these parameters.
In our researches, we found that passivation thickness and field plate overlap length have an optimal value (breakdown voltage reaches 1135V with passivation thickness equals 0.4um and field plate overlap equals 12um, in epitaxy layer concentration equals to 6e15cm-3 condition) with the influence of improving breakdown voltage. We also notice that combining the field plate and the field ring structure can improve about 3~5% of the breakdown voltage comparing with the structure only with field plate.

Contents
摘要....................................................I
Abstract...............................................II
致謝...................................................IV
Contents................................................V
Table Captions.......................................VIII
Figure Captions.........................................X
Chapter 1 Introduction..................................1
1-1 Preface.............................................1
1-2 Power Device Technology Development.................1
1-2-1 Bipolar Power Devices.............................2
1-2-2 Unipolar Power Devices............................2
1-2-3 Ideal Drift Region for Unipolar Power Devices.....5
1-3 SiC Material Properties and Technology..............6
1-3-1 Introduction to SiC...............................6
1-3-2 Capability of SiC Power Devices...................8
1-3-3 Technological Challenges for Manufacturing SiC Devices................................................12
1-4 Motivation.........................................14
Chapter 2 Literature Review and Simulation Selected Models.................................................15
2-1 Literature Review..................................15
2-1-1 Schottky Barrier Diode...........................15
2-1-2 Edge Termination Structure.......................18
2-1-3 Field Plate Extension............................20
2-1-4 Field Ring Structure.............................21
2-2 Simulation Selected Models.........................23
2-2-1 Schoottky Barrier Metal..........................23	2-2-2 Multiple Energy Aluminum Implant.................24
2-2-3 Avalanche Breakdown and Impact Ionization........26
2-2-4 Shockley-Read-Hall Recombination.................27
Chapter 3 Experiment Scheme............................29
3-1 Experimental Procedure.............................29
3-2 Measurement and Analysis of the Device.............30
3-2-1 Characteristics of the Device....................30
3-2-2 Structure of the Device..........................32
3-3 Simulation Design of Device Processing.............37	3-3-1 Field Plate Structure............................37
3-3-2 Field Ring Structure.............................40
Chapter 4 Results and Discussion.......................42
4-1 Field Plate Structure..............................42
4-1-1 Epitaxy Layer Concentration Adjustment...........43
4-1-2 Active Region Adjustment.........................50
4-1-3 Optimal Oxide Thickness..........................54
4-2 Field Ring Structure...............................60
4-2-1 Epitaxy Layer Concentration Adjustment...........61
4-2-2 Active Region Adjustment.........................63
4-2-3 Field Plate Length Adjustment....................64
Chapter 5 Conclusion...................................68
Reference..............................................70
		
Table Captions
Table1-1 Material parameters [11].......................8
Table1-2 Material properties [12].......................9
Table 3-1 Process flow of field plate structure........38
Table 3-2 Process flow of field ring structure.........40
Table 4-1 Breakdown voltage with different metals......43
Table 4-2 Epitaxy layer concentration VS oxide thickness..............................................44
Table 4-3 Epitaxy layer concentration VS oxide thickness (numerical)............................................46
Table 4-4 Forward characteristics with different epitaxy layer concentration....................................47
Table 4-5 Active region length VS oxide thickness......50
Table 4-6 Active region length VS oxide thickness (numerical)............................................52
Table 4-7 Forward characteristics with different active region length..........................................53
Table 4-8 Breakdown voltages with different oxide thickness (I-V curve)..................................54
Table 4-9 Breakdown voltages with different oxide thickness (numerical)..................................55
Table 4-10 Current flow with different oxide thickness.56
Table 4-11 Electric field with different oxide thickness..............................................57
Table 4-12 Epitaxy layer concentration VS oxide thickness (with field plate).....................................61
Table 4-13 Epitaxy layer concentration VS oxide thickness with field plate (numerical)...........................62
Table 4-14 Forward characteristics at different epitaxy layer concentration with field plate...................62
Table 4-15 Active region length VS oxide thickness with field plate............................................63
Table 4-16 Active region length VS oxide thickness with field plate (numerical)................................64
Table 4-17 Oxide thickness VS field plate overlap length.................................................65
Table 4-18 Oxide thickness VS field plate overlap length (numerical)............................................66
		
Figure Captions
Figure 1-1 Energy band diagram of n-type semiconductor Schottky contact [5]....................................2
Figure 1-2 Schottky diode I-V curve [5].................3
Figure 1-3 The ideal drift region and its electric field distribution [6]........................................4
Figure 1-4 P-i-N diode structure and electric field distribution [7]........................................4
Figure 1-5 Illustration of the stacking of successive layers of Si and C to represent the polytypes of SiC [10]....................................................7
Figure 1-6 SiC material properties compare with Si [13]...................................................10
Figure 1-7 Majority and minority carrier devices with SiC and Si [12]............................................11
Figure 1-8 Characteristics with temperature dependency [12]...................................................11
Figure 1-9 Characteristics with forward current dependency [12]........................................12
Figure 1-10 Surface morphology of SiC after annealing without surface protection [14]........................13
Figure 1-11 Surface morphology of SiC after annealing with surface protection [14]...........................13
Figure 2-1 Energy band diagram of a metal adjacent to n-type semiconductor under thermal nonequilibrium condition [17]...................................................16
Figure 2-2 Energy band diagram of a metal-semiconductor contact in thermal equilibrium [17]....................17
Figure 2-3 (a) Band diagram as positive bias is applied to anode...............................................18
Figure 2-3 (b) Band diagram as negative bias is applied to anode...............................................18
Figure 2-4 Silicon carbide Schottky barrier diode [18].18
Figure 2-5 The electronic symbol [19]..................18
Figure 2-6 Field crowding due to junction curvature effects at the edge of a SBD structure under reverse bias [20]...................................................19
Figure 2-7 Electric field distribution inside SBD with field plate edge termination [21]......................20
Figure 2-8 (a) Effect of passivation layers thickness on breakdown voltages [22]................................21
Figure 2-8 (b) Reverse characteristics of Ti/4H-SiC SBD with three different passivation layers [22]...........21
Figure 2-9 Field ring structure [23]...................22
Figure 2-10 Schematic cross section of 4H-SiC SBD with field plate and JTE [24]...............................22
Figure 2-11 Schematic cross section of 4H-SiC SBD with field plate and linear p-top [18]......................22
Figure 2-12 FMR structure [25].........................22
Figure 2-13 FLR structure [26].........................22
Figure 2-14 Energy band diagram of the selected metals and 4H-SiC [17]........................................24
Figure 2-15 Depth profile for boron implantation [27]..25
Figure 2-16 Distribution profiles of Al for multi-energy implantations [28].....................................25
Figure 2-17 (a) Impact ionization [30].................26
Figure 2-17 (b) Avalanche breakdown [30]...............26
Figure 2-18 SRH recombination mechanism [31]...........27
Figure 3-1 (a) DC blocking voltage of the device.......30
Figure 3-1 (b) Forward voltage with different temperature of the device..........................................31
Figure 3-1 (c) Reverse current with different temperature of the device..........................................31
Figure 3-2 (a) Appearance of the device................32
Figure 3-2 (b) Scale of the device.....................32
Figure 3-3 (a) Cross section of the device.............32
Figure 3-3 (b) Top view of the device..................32
Figure 3-4 (a) Top view of the device (OM).............32
Figure 3-4 (b) Cross section of the device (OM)........32
Figure 3-4 (c) Front side and back side metal (OM).....33
Figure 3-4 (d) Front side metal (OM)...................33
Figure 3-5 (a) Front side metal edge (SEM).............34
Figure 3-5 (b) Front side metal edge (mapping).........34
Figure 3-6 (a) Back side metal region (SEM)............35
Figure 3-6 (b) Back side metal region (mapping)........35
Figure 3-7 Oxide thickness of the device (SEM).........36
Figure 3-8 Observed cross section (sketch diagram).....36
Figure 3-9 Process sketch of field plate structure.....39
Figure 3-10 Process sketch of field ring structure.....41
Figure 4-1 Simulated field plate structure.............42
Figure 4-2 (a) Depletion region of p-n diode...........48
Figure 4-2 (b) Charge density of p-n diode depletion region.................................................48
Figure 4-2 (c) Electric field of p-n diode depletion region.................................................48
Figure 4-3 (a) Depletion region of p+-n diode..........49
Figure 4-3 (b) Charge density of p+-n diode depletion region.................................................49
Figure 4-3 (c) Electric field of p+-n diode depletion region.................................................49
Figure 4-4 Electric field of the p+-n diode with increased depletion region.............................49
Figure 4-5 Sketch of field plate structure.............58
Figure 4-6 Simulated field ring structure..............60
Figure 4-7 Sketch of field ring structure..............60
                                    

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校內：2020-08-24公開
校外：2020-08-24公開

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