| 研究生: |
陳伊柔 Chen, I-Jou |
|---|---|
| 論文名稱: |
EPIDETOX:一應用於積體電路設計與工具開發之電子系統層級設計平臺 EPIDETOX: an ESL Platform for Integrated Circuit DEsign and TOol eXploration |
| 指導教授: |
李昆忠
Lee, Kuen-Jong |
| 學位類別: |
碩士 Master |
| 系所名稱: |
電機資訊學院 - 電機工程學系 Department of Electrical Engineering |
| 論文出版年: | 2011 |
| 畢業學年度: | 99 |
| 語文別: | 英文 |
| 論文頁數: | 78 |
| 中文關鍵詞: | 電子系統層級 、設計空間探索 、開發平台 、效能 |
| 外文關鍵詞: | ESL, OCP, AXI, TLM-2.0, QEMU, performance analysis |
| 相關次數: | 點閱:72 下載:0 |
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本篇論文中,我們發展出一個系統層級整合開發環境,名為EPIDETOX,主要用於幫助設計者快速地建構硬體TLM模組,整合硬體於SoC系統中,建構虛擬系統雛形,以及分析不同軟硬體應用的效能。EPIDETOX由三個部份組成: 一整合設計環境,豐富的硬體/系統設計元件,以及一系列設計工具。使用這個平台,硬體/系統設計者能夠處理不同系統設計的問題,像是系統層級的模擬與驗證,演算法與架構共同設計,低功率設計,SoC測試與除錯,以及設計空間探索等設計問題。EPIDETOX採用TLM-2.0 標準做為設計模組共同的介面,以達到隨插即用的能力,且促使系統的
整合能夠更有效率。另外,EPIDETOX提供友善的使用者介面以完成前述的功能。並且提供良好的延展性可以擴充更多開發工具以解決更多問題,綜合上述特性,EPIDETOX成為一用於系統層級設計開發,強大且極易使用的電子系統層級整合開發平台。
This thesis presents a system-level integrated development platform, called EPIDETOX, to help designers build transaction level models of IP designs, integrate IP designs into SoC systems, construct system virtual prototype, and analyze the performance of various application software and hardware. EPIDETOX consists of three parts, namely an integrated design environment, a number of IP/system designs, and a suite of design tools. With this platform, IP/system designers are allowed to deal with various system design issues such as system level simulation/verification, algorithm & architecture co-design, low power design, SoC testing/debugging, and design space exploration. All the capabilities of EPIDETOX are provided via a friendly graphic user interface, which makes EPIDETOX a powerful and very easy-to-use ESL integrated development platform. Several case studies, including some audio/video applications, are presented which validate the efficiency of building SoC systems using EPIDETEX. The exploration capability for various on-chip bus architectures, SoC test architectures and low power design are also demonstrated.
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校內:2012-01-14公開